Posts

Geoffrey Coram Named New CMC Technical Advisor

Geoffrey J. Coram of Analog Devices is the new volunteer technical advisor for the Si2 Compact Model Coalition.  In this newly created position he advises the coalition on Verilog-A implementation for its standard compact models.

Over the past decade, the preferred language for development and implementation of compact models has shifted from C to Verilog-A. Recognizing the importance of the new language, the CMC officers created this position to assist model developers and help encourage best practices.

A senior member of the IEEE, Geoffrey has been an active CMC participant since 2002 and currently leads the CMC subcommittees on Verilog-A recommended practices and the MOS varactor model. In 2004, he led the efforts of the Accellera Verilog-AMS subcommittee to add compact modeling extensions to that modeling language in Language Reference Manual version 2.2.

Geoffrey joined the internal CAD development and circuit simulation group at Analog Devices after earning a Ph.D. from the Massachusetts Institute of Technology in 2000. His undergraduate degree is from Rice University.

Matt Wheaton Joins Si2 for OpenAccess Support

Matthew Wheaton, a software engineering professional whose experience includes more than 12 years at IBM, has joined Si2 as a senior programmer. His first responsibility is to take the lead on system builds and membership support of the Si2 OpenAccess database and scripting extensions, including oaScript.

While at IBM, Wheaton specialized in build, test, and delivery of EDA tools before moving into Front End tool development and management of the primitives library.

He has already built and configured a number of Linux hosts to compile oaScript and oaxPop, which were used to deliver the latest oaScript update (v.3.3).

A native of New England, Wheaton has a Bachelor of Arts degree in Computer Science from Western Connecticut State University.

Si2 Announces Board of Directors for 2016-2017

Si2 Members Meeting Set for Monday, June 6,
at the Design Automation Conference in Austin, Texas

 

AUSTIN, Texas–(BUSINESS WIRE)–The Silicon Integration Initiative (Si2) announced today the election of the 2016-17 board of directors. Board members will be introduced at the Si2 Member Meeting and Reception during the Design Automation Conference (DAC), June 6, 4:00-6:00 p.m., Austin Convention Center, Room A10.

New representatives on the Si2 board are:  Humair Mandavia, chief strategy officer, Zuken (6947: TYO) and Richard Trihy, director of Design Infrastructure, GLOBALFOUNDRIES.

Reelected board members are:

  • Tom Beckley, senior vice president, Custom IC & PCB Group, Cadence Design Systems (NASDAQ: CDNS)
  • David DeMaria, vice president, Corporate Marketing, Synopsys (NASDAQ: SNPS)
  • Keith Greene, distinguished member of the technical staff, Analog Technology Development, Texas Instruments (NASDAQ: TXN)
  • Rahul Goyal, vice president, Technology and Manufacturing Group and Director, EDA Business, Intel (NASDAQ: INTC)
  • Jong-Bae Lee, vice president, Design Technology Team, Samsung Electronics (OTC: SSNLF)
  • Suk Lee, senior director, Design Infrastructure Marketing Division, Taiwan Semiconductor Manufacturing Co. (NYSE: TSM)
  • Pravin Madhani, general manager, Place and Route Division, Mentor Graphics Corp. (NASDAQ: MENT)
  • Leon Stok, vice president, Electronic Design Automation Technologies, IBM (NYSE: IBM)
  • Nick Yu, vice president of Engineering, CDMA Technologies Division, Qualcomm (NASDAQ: QCOM)

“The board of directors plays a critical role in providing strategic direction for Si2,” said John Ellis, president and CEO, Si2.  “Technology advances from the semiconductor industry provide the foundation for ongoing innovation throughout the electronics industry. However, electronic system complexity continues to exponentially increase, at the same time that our industry is consolidating and overall growth has slowed,” he added.

“As a result, the need for efficient use of our members’ resources in collaborating on semiconductor and electronic system design tool interoperability has never been greater. To this end, our board determines the priorities for where Si2 resources must be focused,” Ellis said.

More information on the Si2 member-only meeting, including registration details, is found at: http://www.si2.org/events/si2membermeeting/

About Si2:  Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.  All Si2 activities are carried out under the auspices of the The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. The Si2 international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

Si2 Launches Effort to Develop New Integrated Circuit Power Modeling Technology

AUSTIN, Texas–Silicon Integration Initiative (Si2), an Austin-based integrated circuit research and development joint venture, has launched a project to help designers reduce power consumption, a growing challenge for most system-on-chip designs. The project will develop new power modeling technology to estimate power consumption more easily and more accurately throughout the design process, especially during the earliest stages.

The end result will be a new power modeling standard to reduce resources and costs needed to develop virtually every type of SoC.  Jerry Frenkil, director of OpenStandards, said that the Si2 Low Power Working Group, part of the newly restructured Si2 OpenStandards program, will lead this industry-wide effort.

“Every SoC design team is grappling with the continued need to reduce power consumption,” Frenkil said. “That’s especially true for mobile devices, but it’s also a concern throughout the electronics industry.  One way to accomplish this is through improved multi-level power modeling techniques that better predict SoC power and performance. Right now there’s no commonly accepted way to develop an accurate estimation of power consumption early in the design phase. This often leads to designs being power inefficient, performance constrained, or both.”

Frenkil said the standard will also “enable more efficient and reliable power analyses and optimizations since the same model will be used from system-level design through gate level implementation and all phases in between.”

The approved specification will be contributed to the IEEE P2416 Standards Working Group for industry-wide distribution. Nagu Dhanwada, senior R&D engineer at IBM, chairs both the IEEE P2416 and Si2 Low Power Modeling Working Groups.  “Since Si2 is an R&D joint venture, its members can work together to develop specifications, tests and proof-of-concepts with anti-trust protection. This specification will greatly accelerate standardization efforts within P2416, and testing prior to IEEE standardization will enable us to rapidly prove out the use of the new standard before it hits the street,” Dhanwada explained.

IEEE P2416 is an essential component of a coordinated IEEE effort focusing on system-level design. The IEEE 1801 standard currently expresses design intent.  It’s latest update, IEEE 1801-2015, includes support for power modeling.

John Biggs, co-founder and consultant engineer at ARM, chairs the IEEE 1801 Working Group. “Efforts of the Si2 Low Power Working Group will help the IEEE P2416 Working Group standardize the representation of power consumption data,” Biggs said. The fruits of this work, in combination with the new power modeling capability in IEEE 1801-2015, should greatly ease the challenging task of energy-aware system level design.”

The new Si2 model specification is expected to be completed in October. For more information about this project, contact Jerry Frenkil at Jfrenkil@si2.org.  For information about the Low Power Working Group and other OpenStandards programs, visit http://www.si2.org/openstandards/.

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.  All Si2 activities are carried out under the auspices of the The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. Si2’s international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

 

Plans Begin for PDK Special Interest Group

Si2 is planning to launch its first special interest group, which will focus on process design kits. Ted Paone, interoperability standards architect, said the SIG will “refine the methodology to improve process data and create quality process design kits.” Special interest groups are open to all Si2 members. For more information contact Ted Paone, tedp@si2.org

What You Need to Know about R&D Joint Ventures

Si2 and other research and development joint ventures fill an important need for semiconductor companies competing in a fast-changing global market.

What are R&D joint ventures and what do you need to know about them?

The National Cooperative Research and Production Act of 1993 (NCRPA) is the fundamental law that defines R&D joint ventures and offers them a large measure of protection from federal antitrust laws. R&D joint ventures are formal agreements between two or more companies engaged in the research and development of technologies. They are proven tools for reducing design and production costs and speeding time-to-market.

The Federal Trade Commission and Department of Justice are the NCRPA watchdogs. They review applications for R&D joint ventures, approve or deny them, and monitor the operations of those approved, including any changes in membership.

Benefits of an R&D joint venture
Protection against legal challenges under Sherman and Clayton Antitrust laws is a significant benefit for members of NCRPA-approved, R&D joint ventures. In fact, no successful lawsuit has ever been filed against an NCRPA-approved R&D joint venture. Why? A “rule of reason” antitrust analysis shelters these protected collaborative activities. Without NCRPA protection, a more general “per se” viewpoint is used, where the behavior itself can be deemed to violate antitrust law. Also, if a violation occurs, the claimant can only receive actual damages, rather than treble damages available without NCRPA protection. This is a powerful deterrent against lawsuits.

Legal protections aside, R&D joint ventures can conduct a wide variety of activities, including:

  • perform theoretical analysis, experimentation or testing of basic engineering techniques
  • extend investigative findings into practical application for experimental and demonstration purposes
  • conduct experiments on models, prototypes and processes 
  • perform product certification testing
  • collect, exchange and analyze research or production information

Those types of activities mark a primary difference between an R&D joint venture and standards development organizations. SDOs can only perform voluntary, consensus standards activities, and though the NCRPA antitrust protection covers the SDO, it does not extend these protections to individual SDO members.

Any collaborative R&D activity done under the auspices and guidance of Si2 receives the same anti-trust protection. Si2 special interest groups, coalitions and working groups focus on solving industry problems, knowing they and their companies have the safety the NCRPA provides.

Events

Nothing Found

Sorry, no posts matched your criteria