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Topic Topic Starter Replies Last Post
  Multiple timing modesbruce nepple02014-01-02 21:24
  Retention Clock gating Cell or RTICG cellHiranmay Biswas12013-11-11 09:55
  CPF : Understanding liberty filesnitin thapliyal12013-11-11 01:47
  CPF : Merging multiple CPFsnitin thapliyal12013-11-11 01:43
  The level shifter cell cannot be found in the library?chunshu li12013-08-26 01:33
  How to assign the control signal in CPF for dynamic voltage low power design?chunshu li32013-08-26 00:42
  set_design and set_instance queryChintan Mehta12012-04-27 09:14
  can pin_list be created automatically and manipulated?Edward M Jacobs12012-02-14 08:39
  Is -voltage option mandatory with create_power_nets command ?pankaj jain12011-09-26 10:16
  How DFT logic will be taken care in cpf?Ajish George22011-06-28 08:43
  setting shutting_condition to false constantSuhas32011-01-21 01:57
  what is redundant Isolation?kaggala shankar12011-01-20 12:29
  Questasim -cpf run commandBhavani Shankar32010-02-19 08:26
  CPF Object creation orderChintan Mehta12010-02-12 13:56
  Power Switch Insertionsandeep12010-01-21 17:50
  CPF Hierarchical scope related optionsChintan Mehta32009-12-28 05:03
  Multi Voltage CPU design - querysandeep82009-12-04 16:26
  Level shifter rule for multi voltage designChintan Mehta32009-09-09 16:00
  Converting liberty to CPF.sandeep12009-08-24 13:00
  Are the following syntax legal in CPF 1.1?Arnab Chatterjee12009-04-22 06:22
  Modeling of analog power and other second power suppliesSteven J Urish12009-04-20 12:25
  A query on -of_macro of set_instanceArnab Chatterjee12009-04-20 12:20
  power net inside hierarchy?David Allen82009-03-03 15:16
  Is the following legal CPF 1.1 ?Bob Carver12009-02-26 11:05
  Can the name(s) in update* commandss contain a hierarchical seperatorBob Carver12009-02-26 11:04
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