Bulk Metal-Oxide-Semiconductor Field Effect (MOSFET) Transistors Models
The MOSFET is is widely used for switching and amplifying signals in the electronic circuits. Each MOSFET has 4 terminals, called body (i.e. bulk), source, gate and drain, and is one of the most commonly used transistors in both digital and analog circuits.
BSIM-BULK – Developer: UC Berkeley
BSIM (Berkeley Short-channel IGFET Model)-BULK is the new Bulk MOSFET model from the BSIM Group. The model provides excellent accuracy compared to measured data in all regions of operation. It features model symmetry valued for analog and RF applications while maintaining the strong support and performance of the BSIM model valued for all applications since 1996.
PSP – Developer: CEA-LETI
PSP is a surface-potential based MOS Model, containing all relevant physical effects (mobility reduction, velocity saturation, DIBL, gate current, lateral doping gradient effects, STI stress, etc.) to model present-day and upcoming deep-submicron bulk CMOS technologies. The model has a history of development, starting with NXP and University of Arizona, then University of Delft, and now CEA-LETI in France.
HiSIM – Developer: Hiroshima University
HiSIM (Hiroshima-university STARC IGFET Model) is the first complete surface-potential-based MOSFET model for circuit simulation based on the drift-diffusion approximation, which was originally developed by Pao and Sah. The most important advantage of the surface-potential-based modeling is the unified description of device characteristics for all bias conditions. The physical reliability of the drift-diffusion approximation has been proved by 2D device simulations
Silicon on Insulator MOSFET Models
Silicon on insulator (SOI) technology refers to the use of a layered silicon–insulator–silicon substrate in place of conventional silicon substrates in semiconductor manufacturing, especially microelectronics, to reduce parasitic device capacitance, thereby improving performance. SOI-based devices differ from conventional silicon-built devices in that the silicon junction is above an electrical insulator, typically silicon dioxide. Uses include microprocessor design, high-frequency RF applications, and silicon photonics.
L-UTSOI – Developer: CEA-LETI Currently available to CMC Members only. Public release in June 2021.
L-UTSOI compact model is dedicated to FDSOI technologies, and is the new name of Leti-UTSOI, a high maturity model in development since 2007 and used in industrial environments for nearly 8 years. It continues to benefit from experience accumulated over several industrial technology generations, as well as from more than 25 years of CEA-Leti expertise on FDSOI technology. The L-UTSOI model is able to physically describe FDSOI transistor behavior for any bias configuration, including the case of strong forward back bias where two channels take place at the front and back interfaces of a thin silicon body. Such capability relies on innovative solutions for surface potential analytical calculations and for describing current and charge models.
BSIM-SOI – Developer: UC Berkeley
BSIM-SOI is an CMC standard model for SOI (Silicon-On-Insulator) circuit design. This model is formulated on top of the BSIM3 framework. It shares the same basic equations with the bulk model so that the physical nature and smoothness of BSIM3v3 are retained. Most parameters related to general MOSFET operation (non-SOI specific) are directly imported from BSIM3v3 to ensure parameter compatibility.
HiSIM_SOI – Developer: Hiroshima University
The compact SOI-MOSFET model HiSIM-SOI based on the complete surface-potential description. The model considers all possible charges induced in the device for the formulation of the Poisson equation, which is solved iteratively. Thus HiSIM-SOI is valid for any structural variations from thick to extremely thin SOI or BOX layers, and the dynamic depletion between the fully and partially depleted conditions is well reproduced.
HiSIM_SOTB – Developer: Hiroshima University
HiSIM-SOTB accurately replicates the characteristics of the SOTB-MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), a practical transistor structure for super-low-power-consumption, by lowering the operating voltage of integrated circuits. HiSIM-SOTB enables the accurate simulation of circuit operations in the case of substantially lowered supply voltages for transistor operation, ranging from 1 V to 0.4 V.
Multigate MOSFET Models
A multigate device or multiple-gate field-effect transistor refers to a MOSFET that incorporates more than one gate into a single device. The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes. Multigate transistors are one of the several strategies being developed by CMOS semiconductor manufacturers to create ever-smaller microprocessors and memory cells, colloquially referred to as extending Moore’s law.
BSIM-IMG – Developer: UC Berkeley
BSIM-IMG (Independent Multi-Gate) model has been developed to model the electrical characteristics of the independent double-gate structures like Ultra-Thin Body and BOX SOI transistors (UTBB). It allows different front- and back-gate voltages, work functions, dielectric thicknesses, and dielectric constants.
BSIM-CMG – Developer: UC Berkeley
BSIM-CMG (Common Multi-Gate) is a compact model for the class of common multi-gate FETs. Physical surface-potential-based formulations are derived for both intrinsic and extrinsic models with finite body doping. All the important Multi-Gate (MG) transistor behaviors are captured by this model.
High-Voltage MOSFET Model
HiSIM_HV – Developer: Hiroshima University
There is a requirement for accurate modeling of high-voltage MOSFETs. There are two types of structures commonly used. One is the asymmetrical laterally diffused structure called LDMOS and the other is the symmetrical structure, which is distinguished by referring to it as HVMOS. HiSIM_HV is valid for modeling both structure types, and has been developed as an extension of the HiSIM model for conventional MOSFETs.
Bipolar Transistor Models
Bipolar Transistors are current regulating devices that control the amount of current flowing through them from the Emitter to the Collector terminals in proportion to the amount of biasing voltage applied to their base terminal, thus acting like a current-controlled switch. As a small current flowing into the base terminal controls a much larger collector current forming the basis of transistor action. Bipolar transistors are often used as amplifiers, oscillators, and switches.
HICUM stands for HIgh CUrrent Model and targets the design of bipolar transistor circuits at high-frequencies and high-current densities using a wide range of Si, SiGe or III-V based process technologies. HICUM/L2 is an advanced physics-based compact model that contains accurate formulations of all known physical effects, enables geometry scaling and statistical modeling, and covers a wide temperature, operating and frequency range.
HICUM/L0 – Currently available to CMC Members only. Public release in June 2020.
HICUM/L0 is being developed to reduce the simulation and design time especially for larger circuits. It addresses, compared to the SPICE Gummel-Poon model, modern BJT and HBT technologies by including more accurate formulations for important physical effects such as forward transit time, base-collector punch-through and collector impact ionization. This enables the detection of major design errors. Compared to HICUM/L2, then model’s simplicity makes it less accurate especially at high current densities and high-frequencies.
MEXTRAM is an advanced compact model for the description of bipolar transistors. It contains many features that the widely-used Gummel-Poon model lacks. Mextram can be used for advanced processes like double-poly or even SiGe transistors, for high-voltage power devices, and even for uncommon situations like lateral NPN-transistors in LDMOS technology.
Gallium Nitride (GaN) HEMT (High Electron Mobility Transistor)
Developers: India Institute of Technology, Kanpur, and University of South Florida
Version 101.0.0, released to CMC Members only in March of 2018, was made available to the public on September 24, 2019. Version 101.1.0 (beta) is available to CMC Members only.
Advanced Spice Model for High Electron Mobility Transistors (ASM-HEMT). The physical model is surface potential based and is computationally efficient by virtue of being completely analytical. It includes velocity saturation effects, access region resistance effects, DIBL, temperature dependence and models for gate current and noise.
Version 1.1 available to CMC Members only. Version 1.0 was made available to the public on October 1, 2019
The MVSG model is a physical model for GaN HEMTs that includes formulations for currents and charges that can be used for GaN-based circuit simulations, in particular RF- and HV-applications. The model is charge-based and includes the effect of source and drain access regions, field plates: currents and charges (channel and fringing), gate leakage, self-heating effects, basic-charge trapping and gm-dispersion effects.
CMC Models and APIs distributed by Si2
Login to Si2’s systems may be required.
Version 1.0.0, released to CMC Members only in April of 2018, was made available to the public on October 15, 2019. Newer versions (beta) are available to CMC Members only.
OMI (Open Model Interface) is a CMC standard which provides designers with advanced capabilities, allowing simulating and analysis of self-heating and aging, and ability to perform extended design optimizations. It is based on TMI2, the TSMC Model Interface, which was donated to Si2 by TSMC in 2014. While creating the industry standard, CMC members have also added support for four of the 13 SPICE models currently supported by the coalition: BSIM-BULK, BSIM-CMG, HiSIM2, and BSIM-SOI. As a CMC-standard API, OMI is available to the industry at no charge. CMC members have unique rights to reference code and exclusive access to tutorials, which offer a more streamlined path toward implementation.