Intel, Microsoft, IBM Technologists Elected to Si2 OpenAccess Coalition Leadership Posts

/in , , , /by

Raymond Rodriguez, director of Strategic CAD Capabilities at Intel, has been elected to a one-year term as
chair of the Silicon Integration Initiative OpenAccess Coalition board of directors. Ben Bowers, principal
design engineer at Microsoft, was elected OAC vice-chair. Gregory Schaeffer, senior software engineer at IBM,
was reelected as the OpenAccess Change Team co-architect.

The board manages operational decisions for OpenAccess, the world’s most widely used open reference
database for IC design. The Change Team manages OpenAccess API modifications and database implementation.

Marshall Tiner, Si2 director of Production Standards, said “Continuing engagement of industry leaders Intel,
Microsoft and IBM bodes well for the coalition’s ongoing role in advancing semiconductor design.
Ray, Ben, and Gregory each bring years of experience and expertise to the OpenAccess board and Change Team.”

Raymond Rodriguez

A 20-year Intel veteran, Rodriguez directs a team that oversees electronic design automation,
intellectual property, test and measurement, and security assurance supplier engagements.
He has been an OAC board member since 2012. His volunteer industry experience includes
general chair of the IEEE Electronic Design Process Symposium (2019-2021) and executive
committee member of the Design Automation Conference (2015-2017). Rodriguez has a BSEE
from the University of California, Los Angeles, and an MBA, Executive Program, from the
W.P. Carey School of Business, Arizona State University.

 

Ben Bowers

Bowers joined Microsoft in 2018 after 11 years at Qualcomm. He is a technical lead on a
Microsoft custom circuit CAD team that focuses on all aspects of the design flow, including
PDKs, circuit design, and simulation to physical design. He earned a BSEE from Louisiana
State University and an MSEE from Mississippi State University. He also holds 25 patents
in circuit design and methodology.

 

 

Gregory Schaeffer

In his time at IBM, Schaeffer has held various development and leadership roles in
timing/noise/electrical analysis and physical design tools and holds 21 patents in
these areas. He is the architect of IBM’s Microprocessor back-end construction methodology
and has been involved with Si2 initiatives since 2009. Schaeffer earned a BS and
MS in Computer Science from Case Western Reserve University in 2002.

 

 

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard
interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under
the auspices of The National Cooperative Research and Production Act of 1993, the fundamental
law that defines R&D joint ventures and offers them a large measure of protection against federal
antitrust laws. The Si2 international membership includes semiconductor foundries, fabless
manufacturers, and EDA companies.

Rahul Goyal of Intel Re-elected Board Chair of Silicon Integration Initiative

/in , , /by

AUSTIN, Texas — Rahul Goyal, vice president and director of R&D strategic enablement at Intel, has been re-elected to a one-year term as chairman of the board of directors of Silicon Integration Initiative, a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.

Besides Intel, other companies represented on the Si2 board are: Ansys, Cadence Design Systems, GLOBALFOUNDRIES, Google, IBM, Mentor-a Siemens Business, Qualcomm Technologies, Samsung, Synopsys and Texas Instruments.

John Ellis, Si2 president and CEO, said Goyal’s re-election “provides sustained leadership as we continue to advance with our members into artificial intelligence and machine learning, 5G, and autonomous vehicles, as well as assure continuity and stability during the disruption that COVID has inflicted on our industry.”

Goyal has global responsibility at Intel for strategic sourcing, supply chain strategy, strategic collaborations, ecosystem enablement, data analytics, and capacity management related to product development across Intel’s broad product portfolio. This includes software, system and semiconductor intellectual property, product development outsourcing services, electronic measurement solutions, electronic design automation software, prototyping and verification products used in all aspects of product design, validation and technology development.

Goyal joined Intel in 1989 and has held various technical and management positions in software engineering and technology development. His previous roles there include engineering director in the Design and Technology Solutions Group, director of the integrated silicon technology roadmap development in the Microprocessor Products Group, and senior engineering manager of mask operations. Goyal holds a bachelor’s degree in electrical and electronics engineering from Birla Institute of Technology and Science in Pilani, India, and a master’s degree in computer engineering from Syracuse University in New York.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Si2 Announces 2020 Power of Partnerships Award Winners

/in , /by

AUSTIN, Texas – Semiconductor design experts from industry and academia are this year’s winners of the Silicon Integration Initiative’s Power of Partnerships Award, recognizing the Si2 team that has made the most significant contributions to the field of electronic design automation.

Led by Jerry Frenkil, Si2 director of OpenStandards, members of the Unified Power Model Working Group are being honored for developing Si2 UPM, a system-level power modeling standard which helps designers describe, analyze, and control power consumption, critical factors in reducing overall design costs and increasing chip performance.

Honorees from the UPM Working Group are:

  • Nagu Dhanwada, senior technical staff member, IBM, Working Group Chair
  • Allen Baker, lead software developer, Ansys
  • Daniel Cross, principal solutions engineer, Cadence Design Systems
  • Rhett Davis, professor of Electrical and Computer Engineering, NC State University
  • David Ratchkov, founder and CEO, Thrace Systems

UPM was created under the auspices of the OpenStandards Coalition, a technology incubator developing critical enabling technologies for fast-track industry approval toward standardization. Frenkil said the working group “has pioneered new methods for power modeling and analysis, leading to increased power efficiency. This has created new opportunities for system architects, SoC designers, IP providers, and EDA developers to estimate and control power consumption, especially at the system level.”

UPM led directly to the creation of the IEEE Standard for Power Modeling to Enable System Level Analysis, or IEEE 2416-2019. This standard is based almost entirely on the efforts of the UPM working group.

Each Si2 coalition nominates one team for the annual Power of Partnerships award, which spotlights the essential role volunteers from Si2 member companies play in Si2’s continuing success and value to the industry. The Si2 board of directors selects the winners.

Runners up for 2020 are:

Compact Model Coalition, Open Model Interface Working Group
Chair, Colin Shaw, Silvaco

Contributed to Si2 initially by Taiwan Semiconductor Manufacturing Company, OMI is built around the TSMC Model Interface. OMI allows circuit designers to simulate and analyze such significant physical effects as self-heating and aging, and to perform extended design optimizations, including statistical modeling of process variations.

OpenAccess Coalition, Polygon Operators Working Group
Chair, James Masters, Intel

The Polygon Operators Working Group develops oaxPop, an API extension used with Si2 OpenAccess, the world’s most widely used open reference database for IC design. Originally contributed to Si2 by Intel, oaxPop brings the power of the popular Boost Polygon Library into the expanding OpenAccess design database ecosystem.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Support for OpenAccess 22.50 Ends in June

/in , , /by

Effective June 1, 2020, OpenAccess 22.50 (DM5) will no longer be supported and no further source code changes will be made.

What this means for OpenAccess Coalition Members

The present OA 22.50 releases will be available for the near future, although members should consider plans to migrate to the new OpenAccess 22.60 (DM6). The migration plan is well designed as your OA 22.50 database still works in 22.60.

Should you choose to use the new data model features of OA 22.60 your database will become a DM6 database and can only be read with 22.60.

Going forward, the focus will be on the new OA22.60 data model. This includes support for C++ 11. New oaPartitions classes enable performance and portability enhancements to your applications, including parallel execution with partial loading of data.

The 4G limits have been relaxed on polygon point data and certain types of application defined data. In most cases, databases written by OA 22.60 will remain DM5/OA 22.50 compatible. OA 22.60 will only write a DM6 database if:

  • more than 4G of oaAppProp or oaPointArray data is used or,
  • oaPartitions are created

For more information contact Marshall Tiner, director of Production Standards, [email protected].

Samsung Executive Joins Si2 Board of Directors

/in , , /by

Jung Yun Choi, corporate vice president for the Samsung Electronics Design Technology team, has been elected to the Silicon Integration Initiative board of directors.

A 17-year Samsung veteran, Choi leads the team responsible for developing all design tools and methodologies for Samsung memory products: technologies and environments impacting product values, new process and package technologies, new applications and new working environments such as the Cloud.

Since joining Samsung, he has contributed to the development of low-power design methodologies for mobile devices, RTL-to-GDS implementation and sign-off methodologies.

Choi joined Samsung Electronics in 2003 after receiving his doctorate in electrical engineering at the Pohang University of Science and Technology, Republic of Korea. He was a visiting scholar at Stanford University in 2012.

John Ellis, Si2 president and CEO, said, “Doctor Choi brings a unique, IDM and foundry perspective to Si2. His in-depth understanding of fundamental semiconductor principles, along with his hands-on experience in product development, including our current thrust in system-level power modeling for low-power design, will be extremely valuable as we develop our direction for the future.”

SI2 Launches Special Interest Group For AI and ML in Electronic Design Automation

/in , , , , /by

SIG Will Fill Industry Gaps to Enable Artificial Intelligence and Machine Learning in EDA

Silicon Integration Initiative has launched a special interest group to focus on the growing needs and opportunities in artificial intelligence and machine learning for electronic design automation.

The group will identify current solutions and technology gaps in AI and ML strategies for EDA digital design. “AI and ML are changing semiconductor design and improving performance and time to market,” said Leigh Anne Clevenger, Si2 design automation data scientist.  “Based on member company interest, we expect the SIG to propose prototype projects to accelerate the development of standards in areas such as machine learning training, and data handling and sharing.

“High manufacturing costs and the growing complexity of chip development are spurring disruptive technologies such as AI and ML,” Clevenger explained. “Si2 provides a unique opportunity for semiconductor companies, EDA suppliers and IP providers to voice their needs and focus resources on common solutions, including leveraging university research.”

The SIG is open to all Si2 members and is chaired by Joydip Das, Senior Engineer I, Samsung Austin R&D Center, and co-chaired by Kerim Kalafala, senior technical staff member, EDA, IBM.

“In recent years, the EDA industry has significantly expanded the use of AI/ML technology and techniques in its design tools,” said Das. “We’ve identified the need for a common industry-wide infrastructure to help share this information. This will help eliminate duplicative work and open up avenues for new breakthroughs.”

Other Si2 members participating in the SIG include: Advanced Micro Devices, ANSYS, Cadence Design Systems, Hewlett Packard Enterprise, Intel, Intento Design, NC State University, PDF Solutions, Sandia Labs, Synopsys and the University of California, Berkeley.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. Its activities include support of OpenAccess, the world’s most widely used standard API and reference database for integrated circuit design. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Qualcomm Executive Joins Si2 Board of Directors

/in , , , /by

Pankaj Kukkal, vice president of Engineering at Qualcomm Inc., has been elected to the Silicon Integration Initiative board of directors. Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.

In his current role, Kukkal oversees all EDA, emulation and post-silicon engineering functions for mobile, compute, automotive, and artificial intelligence/machine learning business units. He joined Qualcomm in 2012. He has contributed to delivering over 50 leading-edge SoCs in various application domains.

Kukkal has more than 25 years of experience in EDA, silicon, systems, and software engineering. Before joining Qualcomm, he held various leadership positions at Intel, focusing on CAD, emulation and validation. He has led the creation of several industry-leading technologies for chip design, emulation and post-silicon debug and automation.

Kukkal has a bachelor’s degree in electrical engineering from the National Institutes of Technology, India, and a master’s degree in computer engineering from the University of South Carolina.

John Ellis, president and CEO, said Kukkal brings crucial experience and domain knowledge to the Si2 board.  “Pankaj has been in key, strategic roles at Qualcomm and Intel over his long career. The insights he has gained, along with his extensive network of contacts including former associates, customers and suppliers in the semiconductor industry, will be invaluable as Si2 and its board maps out where the industry is going, and what Si2 members need from us to help propel them there most efficiently.”

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

 

Microsoft, GLOBALFOUNDRIES Join Si2 OpenAccess Coalition

/in , , /by

Growing Membership Shows Ongoing Vertical Integration in IC Design

Austin, Texas—Microsoft Corporation and GLOBALFOUNDRIES have joined Silicon Integration Initiative’s OpenAccess Coalition, a diverse group of international semiconductor companies that support the OpenAccess design database application programming interface.

OpenAccess, which was introduced in 2002, is the most widely used IC design database and is currently supported by its 43 members, representing semiconductors manufacturers and foundries, fabless companies, EDA software providers and systems houses. The OpenAccess database provides EDA software tools with immediate design flow interoperability, saving members time and money.

John Ellis, Si2 president and CEO, said that the recent addition of Microsoft—and Google last year—illustrates the continuing trend of IC design vertical integration. He cited a recent Si2 industry survey which showed “that more than 80 percent of end users develop specialized, internal design tools. OpenAccess allows these home-grown tools to fit into the company’s own, optimized design flow, integrating the best-in-class EDA tools without sacrificing interoperability or performance.

“These end-users are often most interested in the OpenAccess scripting-language interface, which gives engineers direct access into their OA-based design through, for example, the Python programming language,” Ellis said. “This makes their design directly accessible from the console, or rapidly prototyped scripts. Python is well-known and widely adopted by programmers, and has many libraries and tools available, including popular AI development toolkits. The new code release supports these and provides a path toward developing machine-learning-based EDA tools which can make use of the OA database for training.”

Si2 recently introduced OpenAccess Data Model 6, the first major code revision since 2014. DM6 features oaPartitions, a new addition which allows multiprocessing capability to be applied simultaneously to smaller, partitioned regions in large chip designs. Early-stage performance benchmarking by Dr. Rhett Davis from N.C. State University, which was presented at the recent Design Automation Conference, showed under certain circumstances a more than 10x processing speed improvement over the prior version of OpenAccess. DM6 provides a path to higher-efficiency design. Its multiprocessing capability enables cloud-centric design flows for EDA tools which are based on the OpenAccess database.

IEEE Approves New Power Modeling Standard. 2416-2019 Built on Si2 Unified Power Model

/in , , , , /by

AUSTIN, Texas–Silicon Integration Initiative has announced that its Unified Power Model, developed with major contributions from IBM and GLOBALFOUNDRIES, has been approved as IEEE 2416-2019, a new Standard for Power Modeling to Enable System Level Analysis, which complements UPF/IEEE 1801-2018 Standard for Design and Verification of Low-Power, Energy-Aware Electronic Systems.

Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.

UPM/IEEE 2416-2019 provides a rich set of power modeling semantics enabling system designers to model entire systems with great flexibility. It supports power modeling from abstract design description all the way to gate level implementation providing data consistency from earliest architectural explorations to final power verification.

“We view UPM/IEEE 2416 as a major step forward for low power design,” commented Dr. Nagu Dhanwada of IBM, chair of the IEEE 2416 and the Si2 UPM Working Groups.

“The foundation of the UPM/IEEE 2416-2019 standard originated in IBM and has been successfully used in power sign-off of several generations and families of IBM microprocessors. Concepts like multi-level, state-based modeling and efficient, expressive semantics in UPM/IEEE 2416-2019 support constructing accurate and standardized power models for IP blocks. This enables SoC designs to be energy efficient from the ground up, a key reason companies will use 2416-2019 to upgrade modeling, analysis and sign-off flows,” stated Dr. Dhanwada.

Si2 UPM is a product of the Si2 OpenStandards Coalition, an R&D incubator which rapidly seeds and prototypes potential new EDA software tool interoperability standards. “The target of this development and subsequent standardization was an efficient and flexible mechanism for the specification and interchange of consistent power models throughout a project’s lifetime, from system design to manufacturing, especially for IP blocks and chiplets,” said Jerry Frenkil, Si2 director of OpenStandards. “This work led to significant advances in power modeling, including contributor and multi-level modeling, both of which are included in the 2416-2019 standard.”

A prototype power tool, upmPowerCalc, was built to prove the new concepts from end-to-end, both accelerating the delivery of a ready-to-implement standard and providing OpenStandards members with tools to aid in their own implementation.” The Si2 work was supported by the UPM Working Group consisting of ANSYS, IBM, Intel, Cadence, Entasys, and Thrace Systems.

Power contributors are Process, Voltage, and Temperature independent proxies for power. This PVT independence enables the late binding of PVT conditions at simulation run time, enabling power analysis at various PVT corners without requiring new libraries. Multi-level models provide multiple model views, or interfaces, to access the same power data. With multi-level construction, a single model provides consistent data for both system-level abstract simulations and bit-level simulations with RTL or gates.

“These advancements, along with UPM’s semantic expressiveness, deliver multiple benefits for design organizations” Frenkil explained. “System architects and SoC designers can model entire systems at a variety of PVT points with great flexibility. Power can be modeled in UPM using scalars, tables, expressions, and contributors, as well as expressions referencing contributors.”

UPM’s expressiveness also provides major benefits for IP developers. The use of power contributors leads to significant productivity gains since far fewer models and libraries are needed with UPM’s PVT independence. In addition, the models are abstract black boxes – functionality cannot be reverse-engineered from the power models.

Model interoperability and consistency with UPF/IEEE 1801 were identified early on as key goals in support of increasing emphasis on system level design. “IEEE 2416 provides a standardized interoperable system-level power model that is an essential piece of the foundation of an emerging industry-scale chiplet ecosystem” commented Ramune Nagisetty, senior principal engineer and director of Process and Product Integration at Intel Corporation.

“Energy-aware, system-level design can be a challenging task,” added John Biggs, chair of the IEEE P1801 Working Group, and distinguished engineer and co-founder of Arm. “With this new standard, designers will be better enabled by having access to semiconductor IP delivered with both IEEE 1801 power state models and IEEE 2416 power data models.”

For design automation groups, UPM provides an industry-standard format for both internal and external IP. This common format saves resources and time as there is no need to support or translate external proprietary formats. UPM also reduces reliance on internal proprietary formats, a long-standing design obsolescence trap.

An EDA startup, Thrace Systems, is planning to add IEEE 2416 support to its products. “UPM/IEEE 2416 is an important new standard. Its rich modeling semantics provide our power analysis platform with the solid infrastructure needed for comprehensive system level analysis,” commented David Ratchkov, Thrace Systems founder and CEO.

The P2416 Working Group was led by IBM, Si2, and Cadence, with active support from Intel and Arm.

For more information contact Jerry Frenkil at [email protected].

Rahul Goyal of Intel Re-elected Board Chair of Silicon Integration Initiative

/in , , /by

AUSTIN, Texas — Rahul Goyal of Intel has been reelected to a one-year term as board chair of Silicon Integration Initiative, a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. The election was held during Si2’s board meeting at the recent Design Automation Conference.

Other companies represented on the Si2 board are: ANSYS, Cadence Design Systems, GLOBALFOUNDRIES, Google, IBM, Qualcomm Technologies, Samsung, Siemens–a Mentor Business, Synopsys and Texas Instruments.

John Ellis, Si2 president and CEO, said Goyal’s reelection “will assure leadership continuity as we expand support for our members into such advanced technologies as artificial intelligence, machine learning, and design in the cloud.”

A member of the Si2 board since 2003, Goyal is vice president, Technology and Manufacturing Group and director, Research and Development Strategic Enabling for Intel. He has global responsibility for strategic sourcing, supply chain strategy, industry relations, ecosystem development, strategic collaborations, data analytics, and capacity management related to product development across Intel’s broad product portfolio. This includes software, system and semiconductor intellectual property, product development outsourcing services, electronic measurement solutions, Electronic Design Automation software, prototyping and verification products used in all aspects of product design, validation and technology development.

Goyal joined Intel in 1989 and has held various technical and management positions in software engineering and technology development. His previous roles there include engineering director in the Design and Technology Solutions Group, director of the integrated silicon technology roadmap development in the Microprocessor Products Group, and senior engineering manager of mask operations. Goyal holds a bachelor’s degree in electrical and electronics engineering from Birla Institute of Technology and Science in Pilani, India, and a master’s degree in computer engineering from Syracuse University in New York.