Si2 contributes advanced IC power modeling technology to IEEE.

Si2 Contributes Advanced IC Power
Modeling Technology to IEEE

Technology will improve SoC design for power efficiency

AUSTIN, Texas–Silicon Integration Initiative, Inc. (Si2), a leading integrated circuit research and development joint venture, has contributed new power modeling technology to the IEEE P2416 System Level Power Model Working Group. The transfer is aimed at creating a standardized means for modeling systems-on-chip (SoC) designed for lower power consumption.

Jerry Frenkil, Si2 director of OpenStandards, said that the Si2 Low Power Working Group developed the new technology to fill several holes in the flow for estimating and controlling SoC power consumption. “This new modeling technology provides accurate and efficient, early estimation of both static and dynamic power, including critical temperature dependencies, using a consistent model throughout the design flow. There’s currently no standard way to represent power data for use at the system level, especially across a range of process, voltage and temperature points in a single model.”

IEEE P2416 is an essential component of IEEE’s coordinated effort to improve system-level design. This effort also includes the IEEE 1801 standard, which expresses design intent.  Its latest update, IEEE 1801-2015, includes support for power-state modeling.  “P2416 provides power data representations to complement 1801 power-state modeling.  Together, 1801 and 2416 will form a complete power model for hardware IP at any level of abstraction” Frenkil added.

Organizations that contributed to the model development are:  ANSYS, Cadence, Intel, IBM, Entasys, and North Carolina State University.

Nagu Dhanwada, senior technical staff member at IBM, chairs both the IEEE P2416 and Si2 Power Modeling Working Groups. According to Dhanwada, “This is a major contribution to the P2416 effort. As the first technology contribution to the P2416 Working Group, it’s expected to form a solid foundation for the resulting standard.”

“This new modeling technology is the first significant advance in power modeling in quite a long time” said Paul Traynar, technical fellow at ANSYS and a contributor to the Si2 effort.  “It will enable SoC designers to get consistent power estimates across design abstractions and especially early in the system design process.”

Julien Sebot, CPU architect at Intel and a member of the IEEE P2416 Working Group, added, “The Si2 contribution addresses the top priorities identified by the P2416 Working Group. The ability to create accurate, early estimates and to reuse and refine those estimates during the design process is essential in creating energy efficient systems-on-chip.  Si2’s contribution is a major step toward addressing that need.”

The IEEE-P2416 Working Group has already started reviewing the Si2 contribution.  In parallel, Si2 will further develop, for its members, the technology with expanded model semantics, proof-of-concept demonstrations, and reference design implementations.

This model and its use will be described as part of a DAC 2017 tutorial, “How Power Modeling Standards Power Your Designs,” Monday, June 19, 3:30-5:00 p.m., Room 18AB, Austin Convention Center.

For more information about this project, contact Jerry Frenkil at Jfrenkil@si2.org.  For information about the Si2 Low Power Working Group and other OpenStandards programs, visit http://www.si2.org/openstandards/.

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.  All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. Si2’s international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

 

CHIP – PACKAGE CO – DESIGN ( OPEN3D ) Membership Agreement

Membership in the Si2 Chip-Package Co-Design (aka (Open3D))  requires agreement to the following documents.

First:   CHIP-PACKAGE CO-DESIGN (OPEN3D)MEMBERSHIP AGREEMENT

dtmc__dfmc__agreement

Second:  DTMC__DFMC__Operating_Policy-1.pdf:  Attachment C- Project IP Policy

dtmc__dfmc__operating_policy

 

Free Webinar for Si2 Members focuses on XML Schemas

Si2 announces the second in a series of member-only webinars focusing on XML–Introduction to XML Schemas.

XML schemas are the normative definitions of any XML-based standard. The schema defines the domain- specific vocabulary (DSV) and types of values in an XML database. The XML database must conform to its schemas, using the predefined elements and entering values that are compliant with the schema.

Session 1: Schema Syntax                           
Thursday, November 10
10:00 a.m.-11:00 a.m. PST
 
— What is a schema?
— Namespaces
— How to understand the contents of a schema
— Schema elements
– 
Session 2:  Si2 OpenStandards Schemas
Thursday, November 17

10:00 a.m.-11:00 a.m. PST

— Installing Si2 OpenStandards schemas
— What is in each schema
— Examples of compliant XML databases

For more information click here.

Free Webinar for Si2 Members: Introduction to XML

Many Si2 OpenStandards are based on XML, the eXtensible Markup Language. XML files have a consistent syntax and, combined with the domain specific vocabulary defined in the Open Process Specification (OPS) schemas, succinctly capture the data used to model the IC fabrication process to the design tools.

The OPS XML database contains the constraints, layers, stacks, devices and rules that represent the fabrication process in a vendor-neutral format. This single source for the data is used to generate process design kits.

About the Course
This introductory course focuses on the XML file syntax that will help you create well-formed XML files. Through lecture, quizzes and labs, you will examine the syntax of XML elements and learn how to create, modify or read and understand an OPS XML file. We will explore the file format, elements and attributes, namespaces and connecting to schemas.

Prerequisites: A willingness to learn XML and an interest in OPS.

Course Outline

  1.   Exploring XML
    — XML editors
    — What is XML and why do we use it?
    — How do you use OPS XML?
    — What is a valid XML file?
  1.   XML File Format
    — XML prologue and comments
    — XML element declaration
    — Attributes
    — Sub-elements and content value
  1.   Namespaces and Schemas

The example used in the class is a single OPS XML hierarchy that will be used for future courses in this series.  A recording will be available on the Si2 Community web site.

Who Should Attend
Si2 member company employees who work with, create, edit or read XML data files are invited to attend this free webinar. 

Instructor
Ted Paone
Si2 Interoperability Standards Architect

Ted Paone

ADVANCED REGISTRATION REQUIRED
CLICK HERE TO REGISTER


Future Courses for Si2 Members

Si2 will offer additional XML classes  Announcements will be made by email and on our web site, www.si2.org.

  • OpenStandard Schemas
  • XML editors
  • XML utilities
  • XML Python Parser
  • Writing ASCII technology files from OPS XML
  • Inputting comma separated value (CSV) files
  • Xinclude – Building a process database