Si2 contributes advanced IC power modeling technology to IEEE.

Si2 Contributes Advanced IC Power
Modeling Technology to IEEE

Technology will improve SoC design for power efficiency

AUSTIN, Texas–Silicon Integration Initiative, Inc. (Si2), a leading integrated circuit research and development joint venture, has contributed new power modeling technology to the IEEE P2416 System Level Power Model Working Group. The transfer is aimed at creating a standardized means for modeling systems-on-chip (SoC) designed for lower power consumption.

Jerry Frenkil, Si2 director of OpenStandards, said that the Si2 Low Power Working Group developed the new technology to fill several holes in the flow for estimating and controlling SoC power consumption. “This new modeling technology provides accurate and efficient, early estimation of both static and dynamic power, including critical temperature dependencies, using a consistent model throughout the design flow. There’s currently no standard way to represent power data for use at the system level, especially across a range of process, voltage and temperature points in a single model.”

IEEE P2416 is an essential component of IEEE’s coordinated effort to improve system-level design. This effort also includes the IEEE 1801 standard, which expresses design intent.  Its latest update, IEEE 1801-2015, includes support for power-state modeling.  “P2416 provides power data representations to complement 1801 power-state modeling.  Together, 1801 and 2416 will form a complete power model for hardware IP at any level of abstraction” Frenkil added.

Organizations that contributed to the model development are:  ANSYS, Cadence, Intel, IBM, Entasys, and North Carolina State University.

Nagu Dhanwada, senior technical staff member at IBM, chairs both the IEEE P2416 and Si2 Power Modeling Working Groups. According to Dhanwada, “This is a major contribution to the P2416 effort. As the first technology contribution to the P2416 Working Group, it’s expected to form a solid foundation for the resulting standard.”

“This new modeling technology is the first significant advance in power modeling in quite a long time” said Paul Traynar, technical fellow at ANSYS and a contributor to the Si2 effort.  “It will enable SoC designers to get consistent power estimates across design abstractions and especially early in the system design process.”

Julien Sebot, CPU architect at Intel and a member of the IEEE P2416 Working Group, added, “The Si2 contribution addresses the top priorities identified by the P2416 Working Group. The ability to create accurate, early estimates and to reuse and refine those estimates during the design process is essential in creating energy efficient systems-on-chip.  Si2’s contribution is a major step toward addressing that need.”

The IEEE-P2416 Working Group has already started reviewing the Si2 contribution.  In parallel, Si2 will further develop, for its members, the technology with expanded model semantics, proof-of-concept demonstrations, and reference design implementations.

This model and its use will be described as part of a DAC 2017 tutorial, “How Power Modeling Standards Power Your Designs,” Monday, June 19, 3:30-5:00 p.m., Room 18AB, Austin Convention Center.

For more information about this project, contact Jerry Frenkil at Jfrenkil@si2.org.  For information about the Si2 Low Power Working Group and other OpenStandards programs, visit http://www.si2.org/openstandards/.

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.  All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. Si2’s international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

 

Advanced Track Pattern Modeling in Si2 OpenAccess

jamesmasters
JAMES D. MASTERS,
senior CAD engineer at Intel,
discusses advanced track
modeling in the
Si2 OpenAccess database.

Click here to see the video.

 

 

 

 

 

 

 

Paul Stabler New Chairman of Si2 OpenAccess Board

paulstablerPaul Stabler, senior engineering manager in the IBM EDA organization, has been elected chairman of Si2 OpenAccess Coalition for 2017. He replaces Rudy Albachten of Intel, who assumes an advisory role as vice chairman.

The OAC board oversees operational decisions for OpenAccess, the world’s most widely used, open-reference database with its own supporting standard API.

A 35-year IBM veteran, Stabler currently manages clocking, design for manufacturing, and integration tools and methodology. He has been an OAC volunteer for five years.

Nicolas Williams of Mentor Graphics Joins Si2 Standards-Setting Group

nicolasNicolas Williams of Mentor Graphics has been elected to the Si2 Extensions Steering Group. The ESG determines which Si2 OpenAccess Coalition extensions become OAC working groups and move forward for possible industry standardization. At Mentor, Nicolas is responsible for specifying and leading product direction of Tanner tools for analog, RF and MEMS devices.  He also leads PDK conversions efforts for Tanner tools and works closely with customers to develop application specific EDA solutions.

Si2 is a research and development joint venture that provides collaborative research and development leading to accelerated interoperability solutions and standards for integrated circuit design.

 

Accelerating Analog Design and Migration at the Functional Level

ramyiskanderDR. RAMY ISKANDER,
CEO of Intento Design, discusses
the use of  Si2 OpenAccess
in an automated, analog design flow.

Click here to see the video.

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Leveraging OpenAccess to Bridge Gaps in System Co-Design

Mandavia_200sqHUMAIR MANDAVIA,
chief strategy officer at Zuken,
discusses how Si2 OpenAccess
improves interoperability
among different EDA tools.

Click here to see the video.

 

 

 

 

 

 

 

Si2 Special Interest Groups—Forums for Collaborative Problem Solving

Ted

 

 

 

 

 


By Ted Paone
Si2 Interoperability Standards Architect

It is a new year but those design issues you could not fix last year are still robbing your company’s productivity. The problems didn’t stop at the beginning of this year, and there are less time and limited staff to find the solutions.  Well, you are not the only one. In my many years as a corporate application engineer for a large EDA company, I’ve heard the same stories told again and again, with slight variations and a different cast of characters. If I could only get them in the same room, we could discuss the insights to solve these common problems, but that could be collusion with all its consequences.

In 2017, you are no longer alone. The Special Interest Groups (SIG) set up under the anti-trust protection of Si2 allow you to solve design problems with other companies in the industry, sharing hundreds of years of knowledge of designers to address common issues. Si2, as a research and development joint venture, provides an opportunity to collaborate with like-minded companies to identify, document and even solve problems in the electronics/photonics design fields.

Within the Si2 structure, SIGs can be formed to address general or specific design topics such as Silicon Photonic/Electronic Co-Design, Process Design Kit Generation or Design Migration. The SIGs are the incubator for ideas within the Si2 structure. The SIG can create industry surveys to find and prioritize the issues and work with other industry groups to develop roadmaps. Members can jointly write white papers and present at conferences. Using the Si2 infrastructure, the SIG can spawn projects including prototyping implementations, developing standards and creating training and documentation.

sig-chart-copyA special interest group gathers the information and incubates the ideas. The multiple SIGs share their expertise. These ideas feed additional groups through papers, standards, workshops and project and prototype requirements. Project implementation is performed by members themselves or through the Si2 Working Groups under OpenStandards with the support of the working group members. The working groups spring up to complete a project, and the results are available to working group members. Some of the projects directly affect production design standards coalitions, OpenAccess and the Compact Model Coalition. Graduate and undergraduate students participate in development under the mentorship of the SIG and working group members to create the standards and implementations and supporting information. All this is done under the protection of Si2.

Si2 primary mission is identifying common problems and providing paths to solutions. Starting with the Special Interest Groups, the Si2 structure efficiently extends the industry’s resources, enabling collaborative development while protecting proprietary IP. What can we help each other with today?

________

Si2 is a research and development joint venture that provides collaborative research and development leading to accelerated interoperability solutions and standards. As defined by the National Cooperative Research and Production Act of 1993, activities conducted under the auspices and guidance of Si2 receive a large measure of protection against federal anti-trust laws.

Si2 University Partner Network Adds New Member

Jeshairaj Thakaria is the newest member of the Si2 University Partner Network. The network connects qualified engineering student-partners to their future employers in a program that offers real-world, electronic design automation job experience.

A graduate student at the University of Florida Electrical and Computer Engineering Department, Jeshairaj is majoring in digital and mixed signal IC design. His work for Si2 focuses on redeveloping the oaDebug tool set, which gives developers insight into the Si2 OpenAccess database during the development process. oaDebug and oaDiff are the primary products used to develop OpenAccess applications.

For more information on the Si2 University Partner Network visit http://www.si2.org/si2-eda-university-partner-network/

Welcome to our New Members

The Si2 staff and board of directors welcome our newest members:

Si2 OpenAccess Member

INVECAS
Santa Clara, Calif.

Chengdu Higon Integrated Circuit Design Co., Ltd.
China

Intento Design
Paris

DXCorr Design, Inc.
Sunnyvale, Calif.

Si2 Base Member

Savarti Company Limited
Milpitas, Calif.

Geoffrey Coram Named New CMC Technical Advisor

Geoffrey J. Coram of Analog Devices is the new volunteer technical advisor for the Si2 Compact Model Coalition.  In this newly created position he advises the coalition on Verilog-A implementation for its standard compact models.

Over the past decade, the preferred language for development and implementation of compact models has shifted from C to Verilog-A. Recognizing the importance of the new language, the CMC officers created this position to assist model developers and help encourage best practices.

A senior member of the IEEE, Geoffrey has been an active CMC participant since 2002 and currently leads the CMC subcommittees on Verilog-A recommended practices and the MOS varactor model. In 2004, he led the efforts of the Accellera Verilog-AMS subcommittee to add compact modeling extensions to that modeling language in Language Reference Manual version 2.2.

Geoffrey joined the internal CAD development and circuit simulation group at Analog Devices after earning a Ph.D. from the Massachusetts Institute of Technology in 2000. His undergraduate degree is from Rice University.