Learn about this Intel contribution to Si2 and the industry, and join us for lunch at a special DAC 2017 program. https://lnkd.in/e8TJ7kG
Si2 oaScript Symposium:
Scripting Made Easy
Austin Convention Center, Room 7
Tuesday, June 20, 2017, 1:00 – 3:00 p.m.
- Can you easily write new applications for your users?
We’ll show you how.
- Can you easily integrate script tools into your applications?
We’ll show you how.
- Do your applications have a fast-track learning system?
We’ll show you ours.
Join us at DAC 2017 to learn how EDA engineers, product developers and designers are more productive using oaScript.
Tom Whipple, solutions architect at Zuken, has been reelected chair of the Si2 Chip-Package Co-Design Technical Advisory Board. The TAB’s primary goal is to identify problems in chip-package-board design flows, and flows and data exchange solutions to solve them.
At Zuken, Tom is responsible for defining, promoting and supporting chip-package-board co-design solutions using Zuken CR-8000 design tools.
Si2 Contributes Advanced IC Power
Modeling Technology to IEEE
Technology will improve SoC design for power efficiency
AUSTIN, Texas–Silicon Integration Initiative, Inc. (Si2), a leading integrated circuit research and development joint venture, has contributed new power modeling technology to the IEEE P2416 System Level Power Model Working Group. The transfer is aimed at creating a standardized means for modeling systems-on-chip (SoC) designed for lower power consumption.
Jerry Frenkil, Si2 director of OpenStandards, said that the Si2 Low Power Working Group developed the new technology to fill several holes in the flow for estimating and controlling SoC power consumption. “This new modeling technology provides accurate and efficient, early estimation of both static and dynamic power, including critical temperature dependencies, using a consistent model throughout the design flow. There’s currently no standard way to represent power data for use at the system level, especially across a range of process, voltage and temperature points in a single model.”
IEEE P2416 is an essential component of IEEE’s coordinated effort to improve system-level design. This effort also includes the IEEE 1801 standard, which expresses design intent. Its latest update, IEEE 1801-2015, includes support for power-state modeling. “P2416 provides power data representations to complement 1801 power-state modeling. Together, 1801 and 2416 will form a complete power model for hardware IP at any level of abstraction” Frenkil added.
Organizations that contributed to the model development are: ANSYS, Cadence, Intel, IBM, Entasys, and North Carolina State University.
Nagu Dhanwada, senior technical staff member at IBM, chairs both the IEEE P2416 and Si2 Power Modeling Working Groups. According to Dhanwada, “This is a major contribution to the P2416 effort. As the first technology contribution to the P2416 Working Group, it’s expected to form a solid foundation for the resulting standard.”
“This new modeling technology is the first significant advance in power modeling in quite a long time” said Paul Traynar, technical fellow at ANSYS and a contributor to the Si2 effort. “It will enable SoC designers to get consistent power estimates across design abstractions and especially early in the system design process.”
Julien Sebot, CPU architect at Intel and a member of the IEEE P2416 Working Group, added, “The Si2 contribution addresses the top priorities identified by the P2416 Working Group. The ability to create accurate, early estimates and to reuse and refine those estimates during the design process is essential in creating energy efficient systems-on-chip. Si2’s contribution is a major step toward addressing that need.”
The IEEE-P2416 Working Group has already started reviewing the Si2 contribution. In parallel, Si2 will further develop, for its members, the technology with expanded model semantics, proof-of-concept demonstrations, and reference design implementations.
This model and its use will be described as part of a DAC 2017 tutorial, “How Power Modeling Standards Power Your Designs,” Monday, June 19, 3:30-5:00 p.m., Room 18AB, Austin Convention Center.
For more information about this project, contact Jerry Frenkil at Jfrenkil@si2.org. For information about the Si2 Low Power Working Group and other OpenStandards programs, visit http://www.si2.org/openstandards/.
Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. Si2’s international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.
JAMES D. MASTERS,
senior CAD engineer at Intel,
discusses advanced track
modeling in the
Si2 OpenAccess database.
Paul Stabler, senior engineering manager in the IBM EDA organization, has been elected chairman of Si2 OpenAccess Coalition for 2017. He replaces Rudy Albachten of Intel, who assumes an advisory role as vice chairman.
The OAC board oversees operational decisions for OpenAccess, the world’s most widely used, open-reference database with its own supporting standard API.
A 35-year IBM veteran, Stabler currently manages clocking, design for manufacturing, and integration tools and methodology. He has been an OAC volunteer for five years.
Nicolas Williams of Mentor Graphics has been elected to the Si2 Extensions Steering Group. The ESG determines which Si2 OpenAccess Coalition extensions become OAC working groups and move forward for possible industry standardization. At Mentor, Nicolas is responsible for specifying and leading product direction of Tanner tools for analog, RF and MEMS devices. He also leads PDK conversions efforts for Tanner tools and works closely with customers to develop application specific EDA solutions.
Si2 is a research and development joint venture that provides collaborative research and development leading to accelerated interoperability solutions and standards for integrated circuit design.
DR. RAMY ISKANDER,
CEO of Intento Design, discusses
the use of Si2 OpenAccess
in an automated, analog design flow.
chief strategy officer at Zuken,
discusses how Si2 OpenAccess
among different EDA tools.