Rahul Goyal of Intel Elected Board Chair of Silicon Integration Initiative

AUSTIN, Texas — Rahul Goyal of Intel has been elected to a one-year term as board chair of Silicon Integration Initiative, a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. The election was held during Si2’s board meeting at the recent Design Automation Conference.

A member of the Si2 board since 2003, Goyal is vice president, Technology and Manufacturing Group and director, Research and Development Strategic Enabling for Intel. He has global responsibility for strategic sourcing, supply chain strategy, industry relations, ecosystem development, strategic collaborations, data analytics, and capacity management related to product development across Intel’s broad product portfolio. This includes software, system and semiconductor intellectual property, product development outsourcing services, electronic measurement solutions, Electronic Design Automation software, prototyping and verification products used in all aspects of product design, validation and technology development.

Goyal joined Intel in 1989 and has held various technical and management positions in software engineering and technology development. His previous roles there include engineering director in the Design and Technology Solutions Group, director of the integrated silicon technology roadmap development in the Microprocessor Products Group, and senior engineering manager of mask operations. Goyal holds a bachelor’s degree in electrical and electronics engineering from Birla Institute of Technology and Science in Pilani, India, and a master’s degree in computer engineering from Syracuse University in New York.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. The Si2 international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

Si2 Elects Board Members for 2018-19

Si2 Elects Board Members for 2018-19

For Immediate Release

AUSTIN, Texas–Silicon Integration Initiative (Si2), a global research and development joint venture focused on developing and maintaining design software tool interoperability standards, announced today the election of the 2018-19 board of directors. Board members will be introduced at the Si2 Member Meeting and Reception during the Design Automation Conference (DAC), June 25, 4:00 p.m.-6:00 p.m., Marriott Marquis Hotel, Sierra Room B.

Joining the Si2 Board for the first time is:

  • Jose Corleto, vice president, Engineering, Qualcomm Technologies, Inc. (NASDAQ:QCAM)

Re-elected board members are:

  • David DeMaria, vice president, Corporate Marketing, Synopsys
  • Keith Green, distinguished member of the technical staff, Analog Technology Development, Texas Instruments
  • Rahul Goyal, vice president, Technology and Manufacturing Group and director, Research and Development Strategic Enabling, Intel Corp.
  • Jong-Bae Lee, vice president,  Design Technology Team, Samsung Electronics
  • Leon Stok, vice president,  Electronic Design Automation Technologies, IBM
  • Humair Mandavia, Chief Strategy Officer, Zuken, Inc.
  • Stanley Krolikoski, fellow, Strategic Alliances, Cadence Design Systems
  • Richard Trihy, Senior Director, Design Enablement, GLOBALFOUNDRIES
  • Mick Tegethoff, director of Product Marketing for Analog/Mixed-Signal/RF IC Verification Solutions, Mentor, a Siemens Business

Details on the Si2 Member Meeting and Reception and other Si2 DAC activities are available at http://www.si2.org/dac-2018/

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. The Si2 international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

Contact:

Silicon Integration Initiative
Terry Berke
512-917-1358
tberke@si2.org

Si2 to Demonstrate System-Level Unified Power Model and Power Tool at DAC 2018

Si2 to Demonstrate System-Level Unified Power Model and Power Tool at DAC 2018


New Standard and Prototype Tool Estimate and Control IC Power Consumption

AUSTIN, Texas —Silicon Integration Initiative (Si2), an Austin-based integrated circuit research and development joint venture, will demonstrate its Unified Power Model (UPM), a newly developed system-level power modeling standard, and accompanying prototype tool at DAC 2018 in San Francisco. The Si2 standard and tool help designers estimate and control power consumption at the system level, abilities widely identified as critical requirements in meeting product power constraints.

Demonstrations will be held at the Moscone Center, Tuesday, June 26 and Wednesday, June 27, 11:00 a.m. and 2:00 p.m., Booth 1338.

UPM focuses on the system level and provides model consistency across different abstractions, from systems down to gates. Multiple data representations—expressions, multi-dimensional tables, and scalars—provide modeling flexibility. Voltage and temperature independent modeling greatly reduce the model generation and support effort, and enable the late binding of voltage and temperature conditions at simulation run-time.

“UPM is a flexible power modeling standard that facilitates interchange of IP power data, while providing several benefits like reduced model generation effort and costs, and enablement for early, accurate system level power estimates,” said Dr. Nagu Dhanwada of IBM, chair of the Si2 UPM project and the IEEE P2416 working group. UPM is the primary source for the emerging IEEE P2416 standard.

Jerry Frenkil, director of Si2 Open Standards, said UPM was developed to address low-power design issues at the system level. “For IP developers, the rich set of power modeling semantics supports IP macro abstraction and provides flexibility for a variety of modeling approaches.  For SoC designers, UPM’s temperature and voltage sensitive models enable thermally aware, system-level power estimation, vastly improving early analysis and quality of results,” Frenkil said.  “For EDA developers, UPM provides standardized compatibility with UPF/IEEE1801 and opportunities for new applications based upon UPM’s unique features.

“UPM has the additional benefit of industry and academic oversight, as the Si2 Low Power Working Group members—ANSYS, Cadence, Entasys, IBM, Intel and North Caroline State University (NCSU)—oversaw the development,” added Frenkil.  “NCSU’s involvement follows Si2’s long standing practice of partnering with Universities and Professors for collaborative R&D”.

The modeling language and prototype tool using that language, were developed in parallel.  Si2 designed and built a prototype system-level power estimator, PowerCalc, which natively uses the UPM IP models.  Additionally, PowerCalc was built from the ground up with support for multi-processing and cloud computing. This parallel development of the modeling standard and a compatible tool was a major factor in refining the model structure and enabling efficient model execution.

Si2 plans to contribute the latest UPM specification to the IEEE P2416 Standards Working Group for industry-wide standardization and distribution.  “Since Si2 is an R&D joint venture, our members can work together collaboratively, with anti-trust protection, to develop advanced technology, including specifications, prototypes, and reference designs.  Our work on UPM provides P2416 with a proven and ready to use model interface,” Frenkil added.

For more information about this project, contact Jerry Frenkil at Jfrenkil@si2.org.  For information about the Low Power Working Group and other OpenStandards programs, visit http://www.si2.org/openstandards/.

Founded in 1988, Si2 is a leading research and development joint ventures that provides standard interoperability solutions for integrated circuit design tools.  All Si2 activities are carried out under the auspices of the the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. Si2’s international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

 

Contact

Terry Berke
512-917-1358
tberke@si2.org

 

Si2 Open Model Interface Provides Industry-Wide Standard for Advanced SPICE Capabilities

AUSTIN, Texas–The Silicon Integration Initiative Compact Model Coalition has released the Open Model Interface, an Si2 standard, C-language application programming interface that supports SPICE compact model extensions.OMI allows circuit designers to simulate and analyze such important physical effects as self-heating and aging, and perform extended design optimizations. It is based on TMI2, the TSMC Model Interface, which was donated to Si2 by TSMC in 2014. OMI supports four of CMC’s 13 SPICE models:

  • BSIM (Berkeley Short-channel IGFET Model)-BULK, a Bulk MOSFET model that provides excellent accuracy compared to measured data in all regions of operation.
  • BSIM-CMG (Common Multi-Gate), a compact model for the class of common multi-gate FETs. All of today’s important Multi-Gate (MG) transistor behaviors are captured by this model.
  • HiSIM2 (Hiroshima-university STARC IGFET Model), one of the early adopters of the surface potential model compared to the traditional Vt extraction based models
  • BSIM-SOI (Silicon-On-Insulator) a model formulated on top of the BSIM framework which accurately captures the complex physics in silicon-on-insulator devices used in logic and RF applications.

Additional models will continue to be added by the CMC OMI Working Group.

CMC members include semiconductor manufacturers, circuit designers, and simulation tool providers. They pool resources to fund and develop SPICE standard compact models and standard interfaces to promote IC design interoperability. As a publicly available Si2 standard API, OMI can be downloaded at no charge. CMC members have unique access to QA test benches to certify OMI implementation in their software tools.

The public version of OMI, which includes documentation, the API description, and example code is available at http://www.si2.org/cmc

“OMI allows for modeling of device degradation over time, which is referred to as aging, and provides for statistical modeling of process variations,” said John Ellis, Si2 president. “For the most advanced designs, OMI adds to the SPICE flexibility by encapsulating the modeling-layout-dependent efforts of complex structures. New features on top of the SPICE models can be added, such as safe operating area checks.

Colin Shaw, senior applications engineer at Silvaco and chair of the OMI Working Group, stated, “The effort to create an industry standard involved the contributor, TSMC, along with over 40 individuals from CMC member companies. This new release of OMI expands TMI2’s original capability to support of other key models, and is poised to streamline the designer’s optimization capability, as the ability to modify device parameters is standardized by foundries and simulation tool providers.”

Dr. Peter Lee, director at Micron Memory Japan and CMC chair, said,  “As OMI is adopted by foundries and integrated device manufacturers, its benefits and cost-effectiveness will grow. CMC members include leading developers who have committed to aligning their working group efforts with OMI. Through these efforts to increase industry standardization, members have a clear, competitive advantage with access to code and additional resources.”

About the Compact Model Coalition

Now in its 22nd year, the Si2 Compact Model Coalition provides semiconductor manufacturers, designers, and simulation tool providers a means to pool resources to fund standardization and optimization of standard compact (SPICE) models, and standard interfaces to promote simulation tool interoperability. CMC funds and supports select university and national laboratory compact model developers. The CMC quality assurance program ensures that simulations are accurate and uniform across different vendors. The world’s most advanced semiconductor designs are all designed and simulated using the standards funded by the CMC.

About the Silicon Integration Initiative (Si2)

Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

 

We Need Your Insights on How to Improve the IC Design Ecosystem

Silicon Integration Initiative (Si2) has launched a comprehensive, international survey to identify and address ways to streamline and improve the IC design ecosystem.

Survey results will be announced in a DAC 2018 white paper, whose contents will present an industry consensus on specific ways the industry can manage the rising costs of more complex designs and smaller geometries.

You can access the survey and share your insights here. It will take about 20 minutes to complete.

Si2 extends its thanks to the Electronic System Design Alliance for its support of this survey.

Thanks for sharing your expertise!

Complete the survey today! Amazon gift cards will be sent to the first 50 respondents.

What is Open about Si2 OpenAccess?

Marshall 200sq

 

 

 

 

By Marshall Tiner
Director of Production Standards
Si2

What is open about Si2 OpenAccess?

It seems these days everything is “open,” and the terms get confusing. Here is a short history of a few key areas to help clarify things. The label “open source” is credited to the free software movement of 1998. In February of that year, the Open Source Initiative (OSI) was founded and the Open Source Definition adopted. OSI tried to trademark the term “open source,” in an effort to control its usage.

So, what does open source mean?

The term refers to a licensing methodology whereby the source code is made publicly available. Depending on the license terms, others may then download, modify, and publish their version (fork) back to the community. The Apache Software Foundation’s license has become a standard within the open source world.

Silicon Integration Initiative (Si2) was born out of the 1988 CAD Framework Initiative (CFI), with a goal of enabling design tool interoperability. Cadence developed the OpenAccess API to standardize the design database, which resulted in interoperability between design databases from different tool suppliers. With the contribution of the OpenAccess API, the OpenAccess Coalition was formed within Si2. To the design tool user this meant a huge productivity increase when using tools from different suppliers.

Before the OpenAccess Coalition, designs, measurements, and results were passed back and forth between tools via time-consuming, error-prone, file transfers. OpenAccess in effect “opened” the design database so all coalition members could develop tools that shared the database. This removed the cost of the file transfer and allowed two tools to act upon the same data. While file transfer seems like a small thing, it can represent significant cost-of-engineering time on a large design. In addition, it enables the user to check-fix-check errors one at a time instead of several at a time, reducing long file transfer time. Ultimately it benefitted the entire industry enabling “best of “design flows, which are very common today.

So is OpenAccess open source software?

The answer is no. The difference is who the software is open to. OpenAccess is licensed much like open source software, though not open to the general public. The license requires Si2 membership which helps provide the resources required to keep the standard viable for use. There is a significant resource investment associated with OpenAccess. OpenAccess Coalition members have access to the source code and some of the derivative products (called Extensions) to use and even modify if necessary. Much like the Open Software Foundation works for the general public, Si2 and the OpenAccess Coalition provide a means of collaborative development for design product interaction/interoperability. The really great part is that the members realize a 1/N cost advantage developing the standard together rather than each doing it alone.

Is Si2 OpenAccess “open?”

Yes, OpenAccess is open to the OpenAccess Coalition membership, which consists of many electronic design automation tool development companies, and semiconductor companies, that’s pretty open.

Membership cost is based upon the company revenue to allow an easy entry point into the EDA business. A small company can quickly become compatible with the larger suppliers and “plug right into the design flow”. There is no better way to take a new EDA company into the market. Come join the OpenAccess Coalition and align the future with your company’s needs.

Si2 Launches Effort to Standardize New IC Design Language

Silicon Integration Initiative Inc. (Si2), a research and development joint venture providing standard interoperability solutions for IC design tools, has launched a working group to standardize a new, formal declarative language that greatly simplifies finding and correcting design flaws in complex, leading-edge chip designs early in a design flow. Named OPAL (Open Pattern Analysis for Layout), […]

Si2 Approves IC Design Simulation Standards for Gallium Nitride Devices

Si2 Approves Two IC Design
Simulation Standards for Fast-Growing
Gallium Nitride Market


Compact Model Coalition Models Expected to
Reduce Costs, Speed Time-to-Market

 

For Immediate Release

 

AUSTIN–The Silicon Integration Initiative’s (Si2) Compact Model Coalition (CMC) has approved two integrated circuit design simulation standards that target the fast-growing global market for gallium nitride semiconductors.

The approved standards are the 12th and 13th models currently funded and supported by the CMC, a collaborative group that develops and maintains cost-saving SPICE (Simulation Program with Integrated Circuit Emphasis) models for IC design.

John Ellis, president and CEO, said gallium nitride devices are used in many high-power and high-frequency applications, including satellite communications, radar, cellular, broadband wireless systems, and automotive. “Although it’s currently a small market, gallium nitride devices are expected to show remarkable growth over the coming years.”

To reduce research and developments costs and increase simulation accuracy, the semiconductor industry relies on the CMC to share resources for funding standard SPICE models. Si2 is a research and development joint venture focused on IC design and tool operability standards. “Once the standard models are proven and accepted by CMC, they are incorporated into design tools widely used by the semiconductor industry. The equations at work in the standard model-setting process are developed, refined and maintained by leading universities and national laboratories. The CMC directs and funds the universities to standardize and improve the models,” Ellis explained.

Dr. Ana Villamor, technology and market analyst at Yole Développement (Yole), Lyon, France, said that “2015 and 2016 were exciting years for the gallium nitride power business. We project an explosion of this market with 79% CAGR between 2017 and 2022. Market value will reach US $460 million at the end of the period1. It’s still a small market compared to the impressive US $30 billion silicon power semiconductor market,” Villamor said. “However, its expected growth in the short term is showing the enormous potential of the power gallium nitride technology based on its suitability for high performance and high frequency solutions.”

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Peter Lee, manager at Micron Memory Japan and CMC chair, said that “Gallium nitride devices are playing an increasingly important part in the field of RF and power electronics. With these two advanced models established as the first, worldwide gallium nitride model standards, efficiencies in design will greatly increase by making it possible to take into account accurate device physical behavior in design, and enabling the use of the various simulation tools in the industry with consistent results.”

Click here to download standard models.

 

About the Silicon Integration Initiative (Si2)

Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

 

Media Contact:

Terry Berke
512-917-1358
tberke@si2.org

 

  1. Source: Power GaN 2017: Epitaxy, Devices, Applications, and Technology Trends report, Yole Développement, 2017

 


Developer Insights on Gallium Nitride Compact Models

“GaN HEMTs are widely used in power electronic systems and RF power applications, such as radar, wireless backhaul, and base transceiver stations for future high speed and high data rate communication systems. The recent standardization of GaN compact models will be the key enabler for these applications, which require the combination of an efficient foundry/fabless ecosystems.”

Yogesh Chauhan
Co-Developer, GaN ASM-HEMT Model
Associate Professor
IIT Kanpur, India

 


“Advance circuit simulations are a must for optimal, time- and cost-effective use of gallium nitride devices. Device modeling is the heart of circuit simulations, and the “Advance SPICE Model for GaN” (ASM GaN) has been developed after years of rigorous research. This model has been meticulously tested through the CMC process and is a turn-key solution for gallium nitride-based circuit design. I believe ASM GaN will enable design of leading-edge gallium nitride-based products.”

Sourabh Khandelwal
Co-Developer, GaN ASM-HEMT Model
Assistant Professor
Macquarie University
Sydney, Australia

 


“The MIT Virtual Source GaN-HEMT (MVSG) model distills the key physics in the operation of gallium nitride, high-electron-mobility transistors in a numerically robust form to facilitate accurate and meaningful circuit simulations.  Gallium nitride-based product designs in that utilize such physics-based compact models will stand to gain critical insights on device behavior within the system and will save on design overhead.”

Ujwal R. Krishna
Developer, GaN-MVSG Model
Postdoctoral Research Associate
Massachusetts Institute of Technology
Cambridge, Mass.

 

Jushan Xie New Vice-Chair of Si2 Compact Model Coalition

Dr. Jushan Xie, senior software architect at Cadence Design Systems, is the new vice-chair of the Si2 Compact Model Coalition. He joined Cadence in January 1999, working with SPICE (Simulation Program with Integrated Circuit Emphasis) model extraction tools and later SPICE modeling for circuit simulation. He is currently in charge of Spectre SPICE modeling and reliability modeling. He received a Ph.D. in Physics from University of Saarland, Saarbruecken, Germany, in 1996, and a second Ph.D. in applied mathematics from Louisiana Tech University, in 1999.

The Si2 Compact Model Coalition is a collaborative group that develops and maintains cost-saving SPICE models for IC design.