JAMES D. MASTERS,
senior CAD engineer at Intel,
discusses advanced track
modeling in the
Si2 OpenAccess database.
Paul Stabler, senior engineering manager in the IBM EDA organization, has been elected chairman of Si2 OpenAccess Coalition for 2017. He replaces Rudy Albachten of Intel, who assumes an advisory role as vice chairman.
The OAC board oversees operational decisions for OpenAccess, the world’s most widely used, open-reference database with its own supporting standard API.
A 35-year IBM veteran, Stabler currently manages clocking, design for manufacturing, and integration tools and methodology. He has been an OAC volunteer for five years.
Nicolas Williams of Mentor Graphics has been elected to the Si2 Extensions Steering Group. The ESG determines which Si2 OpenAccess Coalition extensions become OAC working groups and move forward for possible industry standardization. At Mentor, Nicolas is responsible for specifying and leading product direction of Tanner tools for analog, RF and MEMS devices. He also leads PDK conversions efforts for Tanner tools and works closely with customers to develop application specific EDA solutions.
Si2 is a research and development joint venture that provides collaborative research and development leading to accelerated interoperability solutions and standards for integrated circuit design.
By Ted Paone
Si2 Interoperability Standards Architect
It is a new year but those design issues you could not fix last year are still robbing your company’s productivity. The problems didn’t stop at the beginning of this year, and there are less time and limited staff to find the solutions. Well, you are not the only one. In my many years as a corporate application engineer for a large EDA company, I’ve heard the same stories told again and again, with slight variations and a different cast of characters. If I could only get them in the same room, we could discuss the insights to solve these common problems, but that could be collusion with all its consequences.
In 2017, you are no longer alone. The Special Interest Groups (SIG) set up under the anti-trust protection of Si2 allow you to solve design problems with other companies in the industry, sharing hundreds of years of knowledge of designers to address common issues. Si2, as a research and development joint venture, provides an opportunity to collaborate with like-minded companies to identify, document and even solve problems in the electronics/photonics design fields.
Within the Si2 structure, SIGs can be formed to address general or specific design topics such as Silicon Photonic/Electronic Co-Design, Process Design Kit Generation or Design Migration. The SIGs are the incubator for ideas within the Si2 structure. The SIG can create industry surveys to find and prioritize the issues and work with other industry groups to develop roadmaps. Members can jointly write white papers and present at conferences. Using the Si2 infrastructure, the SIG can spawn projects including prototyping implementations, developing standards and creating training and documentation.
A special interest group gathers the information and incubates the ideas. The multiple SIGs share their expertise. These ideas feed additional groups through papers, standards, workshops and project and prototype requirements. Project implementation is performed by members themselves or through the Si2 Working Groups under OpenStandards with the support of the working group members. The working groups spring up to complete a project, and the results are available to working group members. Some of the projects directly affect production design standards coalitions, OpenAccess and the Compact Model Coalition. Graduate and undergraduate students participate in development under the mentorship of the SIG and working group members to create the standards and implementations and supporting information. All this is done under the protection of Si2.
Si2 primary mission is identifying common problems and providing paths to solutions. Starting with the Special Interest Groups, the Si2 structure efficiently extends the industry’s resources, enabling collaborative development while protecting proprietary IP. What can we help each other with today?
Si2 is a research and development joint venture that provides collaborative research and development leading to accelerated interoperability solutions and standards. As defined by the National Cooperative Research and Production Act of 1993, activities conducted under the auspices and guidance of Si2 receive a large measure of protection against federal anti-trust laws.
Jeshairaj Thakaria is the newest member of the Si2 University Partner Network. The network connects qualified engineering student-partners to their future employers in a program that offers real-world, electronic design automation job experience.
A graduate student at the University of Florida Electrical and Computer Engineering Department, Jeshairaj is majoring in digital and mixed signal IC design. His work for Si2 focuses on redeveloping the oaDebug tool set, which gives developers insight into the Si2 OpenAccess database during the development process. oaDebug and oaDiff are the primary products used to develop OpenAccess applications.
For more information on the Si2 University Partner Network visit http://www.si2.org/si2-eda-university-partner-network/
Si2 OpenAccess Member
Santa Clara, Calif.
Chengdu Higon Integrated Circuit Design Co., Ltd.
DXCorr Design, Inc.
Si2 Base Member
Savarti Company Limited
Geoffrey J. Coram of Analog Devices is the new volunteer technical advisor for the Si2 Compact Model Coalition. In this newly created position he advises the coalition on Verilog-A implementation for its standard compact models.
Over the past decade, the preferred language for development and implementation of compact models has shifted from C to Verilog-A. Recognizing the importance of the new language, the CMC officers created this position to assist model developers and help encourage best practices.
A senior member of the IEEE, Geoffrey has been an active CMC participant since 2002 and currently leads the CMC subcommittees on Verilog-A recommended practices and the MOS varactor model. In 2004, he led the efforts of the Accellera Verilog-AMS subcommittee to add compact modeling extensions to that modeling language in Language Reference Manual version 2.2.
Geoffrey joined the internal CAD development and circuit simulation group at Analog Devices after earning a Ph.D. from the Massachusetts Institute of Technology in 2000. His undergraduate degree is from Rice University.
Si2 announces the second in a series of member-only webinars focusing on XML–Introduction to XML Schemas.
XML schemas are the normative definitions of any XML-based standard. The schema defines the domain- specific vocabulary (DSV) and types of values in an XML database. The XML database must conform to its schemas, using the predefined elements and entering values that are compliant with the schema.
10:00 a.m.-11:00 a.m. PST
For more information click here.