Colin Shaw of Silvaco Named Si2 Pinnacle Award Winner

Colin Shaw, senior corporate applications engineer at Silvaco, has received the quarterly Silicon Integration Initiative Pinnacle Award, recognizing volunteers for their exceptional contributions to Si2’s success as a leading semiconductor research and development joint venture.

A chartered engineer with over 30 years of semiconductor industry experience, Shaw serves as chair of six Si2 Compact Model Coalition working groups and vice-chair of three others. His expertise includes the production and development of device processes for silicon and II-V compounds, as well as device and circuit design covering test structures, SRAM, IGBT and SAW filters.

For 25 years, CMC has offered semiconductor manufacturers, designers, and simulation tool providers an avenue to collectively fund, develop and optimize standard compact SPICE models and interfaces to promote simulation tool interoperability. CMC funds and supports select university and national laboratory compact model developers to achieve these goals.

“Colin has been a driving force within CMC since its integration with Si2 in 2013,” said John Ellis, Si2 president and CEO. “From leading the working group that created an open, industry-standard model simulator interface, to chairing our two recent gallium nitride and silicon carbide efforts, he has been a consistent coalition leader and team player. This combination of vision and commitment makes Colin truly deserving of the Si2 Pinnacle Award.”

Shaw will present at the quarterly CMC meetings scheduled for December 7-10.

About the Silicon Integration Initiative

Si2 is a leading R&D joint venture that provides standard interoperability solutions for IC design tools. Its primary programs include CMC and OpenAccess, the world’s most widely used open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Silicon Integration Initiative Targets New Silicon Carbide Standard SPICE Model

The Si2 Compact Model Coalition has voted to fund and standardize a SPICE model for silicon carbide-based metal-on-silicon field-effect transistors. Featuring high efficiency and fast operation with low switching losses, silicon carbide-based metal-on-silicon-field effect transistors are popular in high-growth semiconductor applications such as photovoltaic inverters and converters, industrial motor drives, electric vehicle powertrain and EV charging, and power supply and distribution.

 

Peter Lee

A CMC working group will oversee the model development as part of advancing Si2’s mission to reduce interoperability costs, said Peter Lee, CMC chair. Participating companies include Analog Devices, Cadence Design Systems, Infineon, Qualcomm, Siemens EDA, Silvaco and Synopsys. The decision to launch the working group came after the CMC evaluated the model’s ROI for members and interest by the industry at large. “I’d encourage companies with a stake in SiC devices to join this effort and help guide selection of the model which best represents their intended use,” advised Lee. “They can benefit from both cost reduction that comes from shared model support and a standardized and qualified model that has ongoing bug fixes and requested feature enhancements from many like-minded companies.”

 

Colin Shaw

“Next Generation SiC MOSFETS has many features that make them suitable, and even superior to legacy silicon solutions, for several high voltage applications. While the devices can handle high-temperature and voltage, its minimal ON-resistance allows smaller packages and better energy savings than comparable silicon devices,” stated Colin Shaw from Silvaco, the working group chair.

 

 

 

 

About the Compact Model Coalition

Now in its 25th year, the Si2 Compact Model Coalition provides semiconductor manufacturers, designers, and simulation tool providers a means to pool resources to fund standardization and optimization of standard compact SPICE models and standard interfaces to promote simulation tool interoperability. CMC funds and supports select university and national laboratory compact model developers. The CMC quality assurance program ensures that simulations are accurate and uniform across different vendors. The world’s most advanced semiconductor designs are all designed and simulated using the standards funded by the CMC.

 

About the Silicon Integration Initiative (Si2)

Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Si2 Compact Model Coalition Releases Vital Updates to Industry Workhorse BSIM-Bulk

The Si2 Compact Model Coalition has released important updates to the popular BSIM-Bulk standard, a compact SPICE model developed by researchers at the University of California, Berkeley, and supported by developers at the Indian Institute of Technology Kanpur.

Three years in the making, the latest version of BSIM-Bulk offers improved accuracy, convergence and performance over the previous version and various bug fixes. It also features high-voltage transistor modeling, node collapsing, improved flicker noise modeling, and enhanced tuning flexibility in capacitances.

“The new high voltage model provides a good unified solution to low and medium rating of HV-MOS,” said Kaiman Chan of Texas Instruments, chair of the BSIM-Bulk Working Group. “HV-MOS devices are commonly used in radio frequency power amplifiers, power management integrated circuits, and smart power ICs in consumer and automotive applications. BSIM-Bulk’s latest update enables designers to account for unique device phenomena, which are critical for circuit simulation of high-voltage devices.”

To meet the speed requirements of an evolving industry, the latest version of BSIM-Bulk also offers node collapsing, resulting in faster runtime and reduced simulation and design times for modern billion-transistor systems.

The updates also include a revamped flicker noise model, which is relevant to low-noise analog and radio frequency applications. “As the standard method for small-signal flicker noise does not scale to that of large signals, BSIM-Bulk introduced changes for modeling both small and large signal noise accurately,” said Avirup Dasgupta, post-doctoral developer at the University of California, Berkeley. “BSIM-Bulk updates also provide enhanced tuning flexibility of capacitances, increasing accuracy in AC, transient and RF simulation.”

CMC chair Peter Lee praised the group, saying, “These updates add significant breadth and depth to BSIM-Bulk to ensure the model will continue serving the industry for current and future technology generations. The time savings in circuit simulations alone are impressive and provide a meaningful boost to designers.”

The CMC is a collaborative industry group that standardizes SPICE device models. In addition to direct interaction with model developers and priority standing for bug fix and enhancement requests, CMC members receive 18-month advance model access before general release.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Si2 Compact Model Coalition Offers Automatic Rule-Checking Software to Members and Developers

CMC Technical Advisor Geoffrey Coram of Analog Devices has developed and contributed device model rule-enforcing software to Si2. Known as Verilog-A Model Pythonic Rule Enforcer, or VAMPyRE, the software is a standalone compact model parser and checker written in Python.

VAMPyRE checks compact model implementation for a variety of problematic errors, such as hidden-state variables, bias-dependent switch branches, integer division, and unused parameters or variables. VAMPyRE also reviews the style of code, suggesting proper indentation and complaining about extra spaces or tabs. Resolving such errors during development can lead to dramatic time and cost savings during production.

“Commercial simulators generally just run Verilog-A models and are not usually concerned about unused parameters or poor coding style,” Coram said. “But sometimes an ‘unused’ parameter is an indication of an error, because that parameter should have been used in an equation.”  The tool is expected to bring benefits to multiple audiences: model developers want help during code development while EDA vendors would like a consistent coding style to help their optimization. Other CMC members want to verify compliance with the CMC’s Verilog-A Code Standards Policy, which was approved last fall.

CMC Chair Peter Lee agreed. “VAMPyRE is invaluable to enable the development of model code to meet the highest level of quality expected from the models standardized by the CMC. Due to these standard models being widely used in the semiconductor industry, issues with the code can potentially have a large impact to the semiconductor design business. VAMPyRE has already found errors in beta code under development of existing models before release, and we look forward to further improving and enhancing our current and next-generation models with VAMPyRE.”

To encourage widespread adoption, Si2 is offering VAMPyRE to CMC members and model developers under an open-source license.

Si2 Compact Model Coalition Releases BSIM-CMG SPICE Model for Advanced IC Designs

CMC Members Benefit from 18-Month Early Access to New Standard Model

AUSTIN, Texas — The Si2 Compact Model Coalition has released the latest version of BSIM-CMG FinFET, a standard compact SPICE model developed by researchers at the University of California, Berkeley, in conjunction with 20 partners from many of the industry’s leading semiconductor companies.

CMC is a collaborative industry group that standardizes SPICE (Simulation Program with Integration Circuit Emphasis) device models.

John Ellis, Si2 president and CEO, said FinFET is the transistor design that powers the industry along Moore’s Law to advanced leading-edge integrated circuits, including the latest 7nm chips used in every new smartphone, tablet, server, and personal computer. “The industry-standard SPICE model for FinFET is the 3D multi-gate transistor, a critical part of the ecosystem. Its sophistication required a cross-industry team to bring this model to fruition,” Ellis said.

“FinFET” refers to a visual description of a multi-gate, non-planar transistor. In IC design, field-effect-transistor gates wrap around the three sides of a vertical, fin-like channel, creating conducting channels on all sides of the structure. FinFET was named by Dr. Chenming Hu, a National Medal of Technology and Innovation recipient and professor emeritus in the Electronic Engineering and Computer Science Department at UC Berkeley.

“The model updates in the new release (111.0.0) are important refinements and fixes,” stated CMC BSIM-CMG working group chair, Richard Williams. “This new release will benefit all BSIM-CMG users in its myriad applications.” Through the CMC—­and working under Si2’s anti-trust umbrella as a collaborative R&D joint venture—university researchers, simulation software suppliers, fabless, foundry and integrated device manufacturers team up to produce a variety of industry-standard models. CMC members have immediate access to new standards, while new standards are released to the public 18 months after initial release.

Dr. Harshit Agarwal, a post-doctoral developer at UC Berkeley states, “CMC provides a tie to the industry that keeps us in close touch with the customer’s needs. Without CMC there’s no shared funding to support our model standardization, and the data, testing, and feedback on model performance would have to be sought after on a company-by-company basis. Together we are all much more intelligent and customers can cooperatively prioritize their requested features and bug fixes. Beyond this, the quality assurance program provided by CMC ensures our model, and the simulator provider’s implementations, perform at their absolute best for the designers.”

Dr. Peter Lee, CMC chair, agreed and added, “It has been two-and-a-half years since the last major BSIM-CMG update, which is equivalent to a semiconductor generation or two. This new version implements 25 enhancements and 13 bug fixes which improve accuracy, convergence, and performance when compared to the previous version. These changes can have important implications in shortening design time and ensuring first silicon success for a wide variety of products.”

Enhancements include improvements to the thermal noise model and the introduction of gate current scaling factors. Bug fixes include corrected parameter range, and use of macros instead “ifdef’s”, making the code even more robust.

 

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Si2 Names Dr. Rhett Davis Technical and Education Advisor

AUSTIN, Texas — Rhett Davis, professor of Electrical and Computer Engineering at North Carolina State University, has been named Technical and Educational Advisor for Silicon Integration Initiative. Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.

“This new position expands Davis’ reach and impact on the semiconductor industry,” said John Ellis, Si2 president and CEO.  “His experience with the Si2 OpenAccess database and in artificial intelligence and machine learning will be brought to bear on expanding the ecosystem surrounding our newly upgraded version of OA. The new OA release will greater support high-performance, partitioned, multithreaded AI EDA applications. Dr. Davis’ expertise will assist Si2 and its members in bridging the gap between visionary research and real-world, high-performance, AI applications.”

In this expanded advisory role Davis, who has a doctorate in electrical engineering from the University of California at Berkeley, will continue consulting for Si2 in the areas of system-level power modeling and compact modeling. He has been instrumental in prototyping early-stage implementation of the newly created Unified Power Model now being standardized by Si2 within IEEE.  In the Si2 Compact Model Coalition, Davis has helped the Open Model Interface Working Group rearchitect the TSMC-contributed interface, which allows users to modify model parameters during circuit simulation.

Davis will also support the five university members of the OpenAccess Coalition: North Carolina State, University of Florida, State University of New York, Stanford University and Einhoven University of Technology (Netherlands.)  University members have direct use of the OpenAccess database, which streamlines the path to developing design production tools.

Dr. Davis joined North Carolina State University in 2002 as an assistant professor and became professor in 2008. He received the National Science Foundation Faculty Early Career Development award in 2007 and the Si2 Distinguished Service Award in 2012 development of standards for electronic design automation, and the FreePDK open-source, predictive process design kit.

He has been an IEEE member since 1993 and became a senior member in 2011. He has published over 50 scholarly journal and conference articles

Dr. Davis’ research is centered on developing methodologies, CAD tools, and circuits for systems-on-chip in emerging technologies. His interests include 3DIC design and low-power and high-performance circuit design for digital signal-processing and embedded systems.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. Its activities include support of OpenAccess, the world’s most widely used standard API and reference database for integrated circuit design. All Si2 activities are carried out under the auspices of the The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws

Si2 Open Model Interface Provides Industry-Wide Standard for Advanced SPICE Capabilities

AUSTIN, Texas–The Silicon Integration Initiative Compact Model Coalition has released the Open Model Interface, an Si2 standard, C-language application programming interface that supports SPICE compact model extensions.OMI allows circuit designers to simulate and analyze such important physical effects as self-heating and aging, and perform extended design optimizations. It is based on TMI2, the TSMC Model Interface, which was donated to Si2 by TSMC in 2014. OMI supports four of CMC’s 13 SPICE models:

  • BSIM (Berkeley Short-channel IGFET Model)-BULK, a Bulk MOSFET model that provides excellent accuracy compared to measured data in all regions of operation.
  • BSIM-CMG (Common Multi-Gate), a compact model for the class of common multi-gate FETs. All of today’s important Multi-Gate (MG) transistor behaviors are captured by this model.
  • HiSIM2 (Hiroshima-university STARC IGFET Model), one of the early adopters of the surface potential model compared to the traditional Vt extraction based models
  • BSIM-SOI (Silicon-On-Insulator) a model formulated on top of the BSIM framework which accurately captures the complex physics in silicon-on-insulator devices used in logic and RF applications.

Additional models will continue to be added by the CMC OMI Working Group.

CMC members include semiconductor manufacturers, circuit designers, and simulation tool providers. They pool resources to fund and develop SPICE standard compact models and standard interfaces to promote IC design interoperability. As a publicly available Si2 standard API, OMI can be downloaded at no charge. CMC members have unique access to QA test benches to certify OMI implementation in their software tools.

The public version of OMI, which includes documentation, the API description, and example code is available at https://si2.org/cmc

“OMI allows for modeling of device degradation over time, which is referred to as aging, and provides for statistical modeling of process variations,” said John Ellis, Si2 president. “For the most advanced designs, OMI adds to the SPICE flexibility by encapsulating the modeling-layout-dependent efforts of complex structures. New features on top of the SPICE models can be added, such as safe operating area checks.

Colin Shaw, senior applications engineer at Silvaco and chair of the OMI Working Group, stated, “The effort to create an industry standard involved the contributor, TSMC, along with over 40 individuals from CMC member companies. This new release of OMI expands TMI2’s original capability to support of other key models, and is poised to streamline the designer’s optimization capability, as the ability to modify device parameters is standardized by foundries and simulation tool providers.”

Dr. Peter Lee, director at Micron Memory Japan and CMC chair, said,  “As OMI is adopted by foundries and integrated device manufacturers, its benefits and cost-effectiveness will grow. CMC members include leading developers who have committed to aligning their working group efforts with OMI. Through these efforts to increase industry standardization, members have a clear, competitive advantage with access to code and additional resources.”

About the Compact Model Coalition

Now in its 22nd year, the Si2 Compact Model Coalition provides semiconductor manufacturers, designers, and simulation tool providers a means to pool resources to fund standardization and optimization of standard compact (SPICE) models, and standard interfaces to promote simulation tool interoperability. CMC funds and supports select university and national laboratory compact model developers. The CMC quality assurance program ensures that simulations are accurate and uniform across different vendors. The world’s most advanced semiconductor designs are all designed and simulated using the standards funded by the CMC.

About the Silicon Integration Initiative (Si2)

Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

 

Si2 Approves IC Design Simulation Standards for Gallium Nitride Devices

Si2 Approves Two IC Design
Simulation Standards for Fast-Growing
Gallium Nitride Market


Compact Model Coalition Models Expected to
Reduce Costs, Speed Time-to-Market

 

For Immediate Release

 

AUSTIN–The Silicon Integration Initiative’s (Si2) Compact Model Coalition (CMC) has approved two integrated circuit design simulation standards that target the fast-growing global market for gallium nitride semiconductors.

The approved standards are the 12th and 13th models currently funded and supported by the CMC, a collaborative group that develops and maintains cost-saving SPICE (Simulation Program with Integrated Circuit Emphasis) models for IC design.

John Ellis, president and CEO, said gallium nitride devices are used in many high-power and high-frequency applications, including satellite communications, radar, cellular, broadband wireless systems, and automotive. “Although it’s currently a small market, gallium nitride devices are expected to show remarkable growth over the coming years.”

To reduce research and developments costs and increase simulation accuracy, the semiconductor industry relies on the CMC to share resources for funding standard SPICE models. Si2 is a research and development joint venture focused on IC design and tool operability standards. “Once the standard models are proven and accepted by CMC, they are incorporated into design tools widely used by the semiconductor industry. The equations at work in the standard model-setting process are developed, refined and maintained by leading universities and national laboratories. The CMC directs and funds the universities to standardize and improve the models,” Ellis explained.

Dr. Ana Villamor, technology and market analyst at Yole Développement (Yole), Lyon, France, said that “2015 and 2016 were exciting years for the gallium nitride power business. We project an explosion of this market with 79% CAGR between 2017 and 2022. Market value will reach US $460 million at the end of the period1. It’s still a small market compared to the impressive US $30 billion silicon power semiconductor market,” Villamor said. “However, its expected growth in the short term is showing the enormous potential of the power gallium nitride technology based on its suitability for high performance and high frequency solutions.”

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Peter Lee, manager at Micron Memory Japan and CMC chair, said that “Gallium nitride devices are playing an increasingly important part in the field of RF and power electronics. With these two advanced models established as the first, worldwide gallium nitride model standards, efficiencies in design will greatly increase by making it possible to take into account accurate device physical behavior in design, and enabling the use of the various simulation tools in the industry with consistent results.”

Click here to download standard models.

 

About the Silicon Integration Initiative (Si2)

Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

 

Media Contact:

Terry Berke
512-917-1358
[email protected]

 

  1. Source: Power GaN 2017: Epitaxy, Devices, Applications, and Technology Trends report, Yole Développement, 2017

 


Developer Insights on Gallium Nitride Compact Models

“GaN HEMTs are widely used in power electronic systems and RF power applications, such as radar, wireless backhaul, and base transceiver stations for future high speed and high data rate communication systems. The recent standardization of GaN compact models will be the key enabler for these applications, which require the combination of an efficient foundry/fabless ecosystems.”

Yogesh Chauhan
Co-Developer, GaN ASM-HEMT Model
Associate Professor
IIT Kanpur, India

 


“Advance circuit simulations are a must for optimal, time- and cost-effective use of gallium nitride devices. Device modeling is the heart of circuit simulations, and the “Advance SPICE Model for GaN” (ASM GaN) has been developed after years of rigorous research. This model has been meticulously tested through the CMC process and is a turn-key solution for gallium nitride-based circuit design. I believe ASM GaN will enable design of leading-edge gallium nitride-based products.”

Sourabh Khandelwal
Co-Developer, GaN ASM-HEMT Model
Assistant Professor
Macquarie University
Sydney, Australia

 


“The MIT Virtual Source GaN-HEMT (MVSG) model distills the key physics in the operation of gallium nitride, high-electron-mobility transistors in a numerically robust form to facilitate accurate and meaningful circuit simulations.  Gallium nitride-based product designs in that utilize such physics-based compact models will stand to gain critical insights on device behavior within the system and will save on design overhead.”

Ujwal R. Krishna
Developer, GaN-MVSG Model
Postdoctoral Research Associate
Massachusetts Institute of Technology
Cambridge, Mass.

 

Jushan Xie New Vice-Chair of Si2 Compact Model Coalition

Dr. Jushan Xie, senior software architect at Cadence Design Systems, is the new vice-chair of the Si2 Compact Model Coalition. He joined Cadence in January 1999, working with SPICE (Simulation Program with Integrated Circuit Emphasis) model extraction tools and later SPICE modeling for circuit simulation. He is currently in charge of Spectre SPICE modeling and reliability modeling. He received a Ph.D. in Physics from University of Saarland, Saarbruecken, Germany, in 1996, and a second Ph.D. in applied mathematics from Louisiana Tech University, in 1999.

The Si2 Compact Model Coalition is a collaborative group that develops and maintains cost-saving SPICE models for IC design.

Empyrean Software, Qorvo Join Si2 Compact Model Coalition

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Empyrean Software, Qorvo Join Si2 Compact Model Coalition

 

For Immediate Release

 

AUSTIN, Texas—Empyrean Software and Qorvo have joined the Silicon Integration Initiative (Si2) Compact Model Coalition (CMC), a collaborative group that funds the standardization of cost-saving SPICE models for integrated circuit designs.

They join 30 other companies that increasingly rely on the use of industry-standard SPICE models (Simulation Program with Integration Circuit Emphasis) to simulate the performance of new and enhanced chip designs prior to manufacturing. As a research and development joint venture focused on IC design tool operability standards, Si2 provides a legally protected environment for its members to share resources for funding SPICE model standardization.

“SPICE device models are equations that express transistor function. These fundamental building blocks provide IC designers with the ability to simulate and validate design function and performance before entering the capital-intensive phase of manufacturing,“ said John Ellis, Si2 president and CEO. “To reduce R&D costs and increase simulation accuracy, the semiconductor industry has turned to the CMC to pool resources and fund the standardization of best-of breed models.

“Once the standard models are proven and accepted by CMC, they are incorporated into design tools providing cross-correlation between simulators and widely used by the semiconductor industry. The standard models have been developed, and are refined and maintained, under direction and funding by the CMC, by leading universities and national labs,” Ellis explained.

Steve Yang, CEO of Empyrean Software, said “As designs move to advanced processes, the simulation models provided by CMC are vitally important for our tools to provide accurate results and validate designs before they are manufactured.  As the largest China EDA software supplier, Empyrean’s EDA tools cover complete custom AMS design flow: schematic entry, layout editing, circuit simulation, DRC/LVS, and RC extraction.”

For more information about the CMC visit https://si2.org/cmc/.

 

About the Silicon Integration Initiative (Si2)

Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. Its primary products include OpenAccess, the world’s most widely used, open reference database for IC design, with a supporting standard APA. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

 

Media Contact:

Terry Berke
512-917-1358
[email protected]