GaN HEMT SPICE Model Standard for Power and RF


Si2’s Compact Model Coalition is currently in the third phase of our process to define a standard model for GalliumNitride (GaN) High Electron-Mobility Transistors (HEMTs). These devices are currently used in high power switching and RF applications, where their power and speed sets them apart from most other technologies. We started with eight candidates, which have been down-selected to two remaining candidates, based on a set of technical requirements. In the current phase, member companies are asked to perform their own evaluations hopefully leading to a standard in 2016.


Samuel Mertens is working for Cadence Design Systems on the Spectre circuit simulator, after working at Ansoft, Ansys, Agilent and Keysight. He has been an active representative at the CMC since 2004, having chaired the CMC’s Standard Spice Language standard. Samuel graduated with a Physics Engineering (BS) degree from the University of Gent (Belgium) and the MS and PhD in Electrical Engineering and Computer Sciences from Massachusetts Institute of Technology (Cambridge, MA).


Geoffrey Coram Named New CMC Technical Advisor

Geoffrey J. Coram of Analog Devices is the new volunteer technical advisor for the Si2 Compact Model Coalition.  In this newly created position he advises the coalition on Verilog-A implementation for its standard compact models.

Over the past decade, the preferred language for development and implementation of compact models has shifted from C to Verilog-A. Recognizing the importance of the new language, the CMC officers created this position to assist model developers and help encourage best practices.

A senior member of the IEEE, Geoffrey has been an active CMC participant since 2002 and currently leads the CMC subcommittees on Verilog-A recommended practices and the MOS varactor model. In 2004, he led the efforts of the Accellera Verilog-AMS subcommittee to add compact modeling extensions to that modeling language in Language Reference Manual version 2.2.

Geoffrey joined the internal CAD development and circuit simulation group at Analog Devices after earning a Ph.D. from the Massachusetts Institute of Technology in 2000. His undergraduate degree is from Rice University.