Committee Corner: Aparna Dey, Cadence Design Systems

Recognizing Outstanding 
Si2 Committee Volunteers
 

aparnaAparna Dey chairs the Si2 Low Power Working Group and represents Cadence Design Systems in other Si2 activities and industry standards organizations. She also chairs the IEEE Electronic Design Symposium, an annual conference held in Monterey, Calif., and is the treasurer for IEEE Design Automation Standards Committee.

As the technical marketing group director in the Cadence Standards Group, Dey has focused on standards since 2012. It’s a role she finds both interesting and challenging.  “It’s exciting and rewarding to work together in the standards committee with our industry peers, including our competitors and customers, on interoperability solutions. However, showing our technical leadership while being mindful of what we contribute is a balancing act at times.”

Her 14 years at Cadence includes various engineering, methodology services, and technical marketing positions. She led the ASIC Alliances and SOC/IP Reuse Group in the Alliances and Methodology Services Division. That background provides a good match for her current role.  “Working with R&D architects to determine which standards are useful to which products requires broad exposure to all our marketing efforts.”

One side benefit to her current role is a reduced travel schedule, allowing her to spend more time with her third-grade daughter. “She loves math and science and hopes to be an engineer.”

Dey holds a Bachelor of Engineering degree in Electronics and Telecommunication from Netaji Subhas Institute of Technology, University of Delhi, India.

Member Spotlight: PhoeniX Software

By Twan Korthorst
Chief Executive Officer
PhoeniX Software
The Netherlands
www.phoenixbv.com

With the applications space for integrated photonics expanding into traditional electronics areas, existing EDA and photonics design automation design methodologies must merge to provide the most efficient design flow.

As integrated photonics presents physical and analytical challenges that require unique methods not available in traditional electronic IC design tools, these need to be addressed. PhoeniX Software’s OptoDesigner Photonic IC phoenixdesign platform, with native curvilinear and all angle layout capabilities, can be used either stand-alone for photonic IC design or closely interfaced with EDA solutions to support the design of complex photonic-electronic ICs within an integrated environment.

Si2 Launches Effort to Develop New Integrated Circuit Power Modeling Technology

AUSTIN, Texas–Silicon Integration Initiative (Si2), an Austin-based integrated circuit research and development joint venture, has launched a project to help designers reduce power consumption, a growing challenge for most system-on-chip designs. The project will develop new power modeling technology to estimate power consumption more easily and more accurately throughout the design process, especially during the earliest stages.

The end result will be a new power modeling standard to reduce resources and costs needed to develop virtually every type of SoC.  Jerry Frenkil, director of OpenStandards, said that the Si2 Low Power Working Group, part of the newly restructured Si2 OpenStandards program, will lead this industry-wide effort.

“Every SoC design team is grappling with the continued need to reduce power consumption,” Frenkil said. “That’s especially true for mobile devices, but it’s also a concern throughout the electronics industry.  One way to accomplish this is through improved multi-level power modeling techniques that better predict SoC power and performance. Right now there’s no commonly accepted way to develop an accurate estimation of power consumption early in the design phase. This often leads to designs being power inefficient, performance constrained, or both.”

Frenkil said the standard will also “enable more efficient and reliable power analyses and optimizations since the same model will be used from system-level design through gate level implementation and all phases in between.”

The approved specification will be contributed to the IEEE P2416 Standards Working Group for industry-wide distribution. Nagu Dhanwada, senior R&D engineer at IBM, chairs both the IEEE P2416 and Si2 Low Power Modeling Working Groups.  “Since Si2 is an R&D joint venture, its members can work together to develop specifications, tests and proof-of-concepts with anti-trust protection. This specification will greatly accelerate standardization efforts within P2416, and testing prior to IEEE standardization will enable us to rapidly prove out the use of the new standard before it hits the street,” Dhanwada explained.

IEEE P2416 is an essential component of a coordinated IEEE effort focusing on system-level design. The IEEE 1801 standard currently expresses design intent.  It’s latest update, IEEE 1801-2015, includes support for power modeling.

John Biggs, co-founder and consultant engineer at ARM, chairs the IEEE 1801 Working Group. “Efforts of the Si2 Low Power Working Group will help the IEEE P2416 Working Group standardize the representation of power consumption data,” Biggs said. The fruits of this work, in combination with the new power modeling capability in IEEE 1801-2015, should greatly ease the challenging task of energy-aware system level design.”

The new Si2 model specification is expected to be completed in October. For more information about this project, contact Jerry Frenkil at Jfrenkil@si2.org.  For information about the Low Power Working Group and other OpenStandards programs, visit http://www.si2.org/openstandards/.

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.  All Si2 activities are carried out under the auspices of the The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. Si2’s international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.